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PDF AD7328 Data sheet ( Hoja de datos )
| Número de pieza | AD7328 | |
| Descripción | 12-Bit Plus Sign ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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8-Channel, Software-Selectable True
Bipolar Input, 12-Bit Plus Sign ADC
AD7328
FEATURES
12-bit plus sign SAR ADC
True bipolar input ranges
Software-selectable input ranges
±10 V, ±5 V, ±2.5 V, 0 V to +10 V
1 MSPS throughput rate
Eight analog input channels with channel sequencer
Single-ended, true differential, and pseudo differential
analog input capability
High analog input impedance
Low power: 21 mW
Temperature indicator
Full power signal bandwidth: 22 MHz
Internal 2.5 V reference
High speed serial interface
Power-down modes
20-lead TSSOP package
iCMOS™ process technology
GENERAL DESCRIPTION
The AD73281 is an 8-channel, 12-bit plus sign, successive
approximation ADC designed on the iCMOS (industrial
CMOS) process. iCMOS is a process combining high voltage
silicon with submicron CMOS and complementary bipolar
technologies. It enables the development of a wide range of high
performance analog ICs capable of 33 V operation in a footprint
that no previous generation of high voltage parts could achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can accept bipolar input signals while providing
increased performance, dramatically reduced power consumption,
and reduced package size.
The AD7328 can accept true bipolar analog input signals. The
AD7328 has four software-selectable input ranges, ±10 V, ±5 V,
±2.5 V, and 0 V to +10 V. Each analog input channel can be
independently programmed to one of the four input ranges. The
analog input channels on the AD7328 can be programmed to be
single-ended, true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7328 also
allows for external reference operation. If a 3 V reference is applied
to the REFIN/OUT pin, the AD7328 can accept a true bipolar
±12 V analog input. Minimum ±12 V VDD and VSS supplies are
required for the ±12 V input range. The ADC has a high speed
serial interface that can operate at throughput rates up to 1 MSPS.
FUNCTIONAL BLOCK DIAGRAM
VDD
REFIN/OUT VCC
AD7328
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
I/P
MUX
CHANNEL
SEQUENCER
2.5V
VREF
T/H
13-BIT
SUCCESSIVE
APPROXIMATION
ADC
TEMPERATURE
INDICATOR
CONTROL LOGIC
AND REGISTERS
DOUT
SCLK
CS
DIN
AGND
VSS DGND
Figure 1.
VDRIVE
PRODUCT HIGHLIGHTS
1. The AD7328 can accept true bipolar analog input signals,
±10 V, ±5 V, ±2.5 V, and 0 V to +10 V unipolar signals.
2. The eight analog inputs can be configured as eight single-
ended inputs, four true differential input pairs, four pseudo
differential inputs, or seven pseudo differential inputs.
3. 1 MSPS serial interface. SPI®-/QSPI™-/DSP-/MICROWIRE™-
compatible interface.
4. Low power, 30 mW, at a maximum throughput rate of
1 MSPS.
5. Channel sequencer.
Table 1. Similar Product Selection
Device Throughput
Number Rate
Number of Bits
AD7329 1000 kSPS
12-bit plus sign
AD7327 500 kSPS
12-bit plus sign
AD7324 1000 kSPS
12-bit plus sign
AD7323 500 kSPS
12-bit plus sign
AD7322 1000 kSPS
12-bit plus sign
AD7321 500 kSPS
12-bit plus sign
Number of
Channels
8
8
4
4
2
2
1 Protected by U.S. Patent No. 6,731,232.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
AD7328
Parameter1
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output
Capacitance3
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition
Time2, 3
Throughput Rate
POWER REQUIREMENTS
VDD
VSS
VCC
VDRIVE
Normal Mode (Static)
Normal Mode (Operational)
IDD
ISS
ICC and IDRIVE
Autostandby Mode (Dynamic)
IDD
ISS
ICC and IDRIVE
Autoshutdown Mode (Static)
IDD
ISS
ICC and IDRIVE
Full Shutdown Mode
IDD
ISS
ICC and IDRIVE
POWER DISSIPATION
Normal Mode
Full Shutdown Mode
B Version
Min Typ Max
2.4
10
0.8
0.4
±1
VDRIVE −
0.2
5
0.4
±1
Straight natural binary
Twos complement
800
305
1
770
12
−12
2.7
2.7
0.9
16.5
−16.5
5.25
5.25
360
410
3.2
200
210
1.3
1
1
1
1
1
1
30
21
38.25
Unit Test Conditions/Comments
V
V VCC = 4.75 V to 5.25 V
V VCC = 2.7 to 3.6 V
μA VIN = 0 V or VDRIVE
pF
V ISOURCE = 200 μA
V ISINK = 200 μA
μA
pF
Coding bit set to 1 in control register
Coding bit set to 0 in control register
ns
ns
MSPS
kSPS
V
V
V
V
mA
μA
μA
mA
μA
μA
mA
μA
μA
μA
μA
μA
μA
16 SCLK cycles with SCLK = 20 MHz
Full-scale step input; see the Terminology section
See the Serial Interface section; VCC = 4.75 V to 5.25 V
VCC < 4.75 V
Digital inputs = 0 V or VDRIVE
See Table 6
See Table 6
See Table 6; typical specifications for VCC < 4.75 V
VDD/VSS = ±16.5 V, VCC/VDRIVE = 5.25 V
fSAMPLE = 1 MSPS
VDD = 16.5 V
VSS = −16.5 V
VCC/VDRIVE = 5.25 V
fSAMPLE = 250 kSPS
VDD = 16.5 V
VSS = −16.5 V
VCC/VDRIVE = 5.25 V
SCLK on or off
VDD = 16.5 V
VSS = −16.5 V
VCC/VDRIVE = 5.25 V
SCLK on or off
VDD = 16.5 V
VSS = −16.5 V
VCC/VDRIVE = 5.25 V
mW VDD = 16.5 V, VSS = −16.5 V, VCC = 5.25 V
mW VDD = 12 V, VSS = −12 V, VCC = 5 V
μW VDD = 16.5 V, VSS = −16.5 V, VCC = 5.25 V
1 Temperature range is −40°C to +85°C.
2 See the Terminology section.
3 Sample tested during initial release to ensure compliance.
4 For dc accuracy specifications, the LSB size for differential mode is FSR/8192. For single-ended mode/pseudo differential mode, the LSB size is FSR/4096, unless otherwise noted.
5 Unipolar 0 V to 10 V range with straight binary output coding.
6 Bipolar range with twos complement output coding.
Rev. A | Page 5 of 36
5 Page 
8k
7600
VCC = 5V
7k
VDD/VSS = ±12V
RANGE = ±10V
10k SAMPLES
6k TA = 25°C
5k
4k
3k
2k
1201
1165
1k
0 23
0
–3 –2 –1
0
11 0
123
CODE
Figure 16. Histogram of Codes, Single-Ended Mode
AD7328
2.0
1.5
INL = 500kSPS
1.0 INL = 750kSPS
0.5
INL = 1MSPS
0
INL = 500kSPS INL = 750kSPS
–0.5
–1.0
–1.5
–2.0
5
INL = 1MSPS
7 9 11
±5V RANGE
VCC = VDRIVE = 5V
INTERNAL REFERENCE
SINGLE-ENDED MODE
13 15 17 19
±VDD/VSS SUPPLY VOLTAGE (V)
Figure 19. INL Error vs. Supply Voltage at 500 kSPS, 750 kSPS, and 1 MSPS
–50
–55
–60
–65
–70 VCC = 5V
–75
–80 VCC = 3V
–85
–90
–95
DIFFERENTIAL MODE
FIN = 50kHz
VDD/VSS = ±12V
fS = 1MSPS
TA = 25°C
–100
0
200
400
600
800
1000
1200
RIPPLE FREQUENCY (kHz)
Figure 17. CMRR vs. Common-Mode Ripple Frequency
–50
100mV p-p SINE WAVE ON EACH SUPPLY
–55 NO DECOUPLING
SINGLE-ENDED MODE
–60 fS = 1MSPS
–65
VCC = 5V
–70 VCC = 3V
–75
–80 VDD = 12V
–85 VSS = –12V
–90
–95
–100
0
200
400
600
800
1000
1200
SUPPLY RIPPLE FREQUENCY (kHz)
Figure 20. PSRR vs. Supply Ripple Frequency Without Supply Decoupling
2.0
DNL = 750kSPS
1.5
DNL = 500kSPS
1.0
0.5
DNL = 1MSPS
0 DNL = 1MSPS
–0.5
–1.0 DNL = 750kSPS
±5V RANGE
–1.5
VCC = VDRIVE = 5V
INTERNAL REFERENCE
SINGLE-ENDED MODE
–2.0
5 7 9 11
13
DNL = 500kSPS
15 17 19
±VDD/VSS SUPPLY VOLTAGE (V)
Figure 18. DNL Error vs. Supply Voltage at 500 kSPS, 750 kSPS, and 1 MSPS
–50
VCC = VDRIVE = 5V
–55
VDD/VSS = ±12V
TA = 25°C
INTERNAL REFERENCE
–60 RANGE = ±10V AND ±2.5V
RIN = 100Ω, ±10V RANGE
–65 RIN = 2000Ω, ±10V RANGE
–70 RIN = 1000Ω, ±10V RANGE
RIN = 50Ω,
±10V RANGE
RIN = 4700Ω,
±2.5V RANGE
–75 RIN = 2000Ω,
±2.5V RANGE
–80
–85
–90
–95
10
RIN = 1000Ω,
±2.5V RANGE
RIN = 100Ω,
±2.5V RANGE
RIN = 50Ω,
±2.5V RANGE
100 1000
ANALOG INPUT FREQUENCY (kHz)
Figure 21. THD vs. Analog Input Frequency for Various Source Impedances,
True Differential Mode
Rev. A | Page 11 of 36
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7328.PDF ] | |
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