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PDF ADUM3100 Data sheet ( Hoja de datos )

Número de pieza ADUM3100
Descripción Enhanced System-Level ESD Reliability
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
Digital Isolator, Enhanced
System-Level ESD Reliability
ADuM3100
FEATURES
Enhanced system-level ESD performance per IEC 61000-4-x
High data rate: dc to 100 Mbps (NRZ)
Compatible with 3.3 V and 5.0 V operation/level translation
105°C maximum operating temperature
Low power operation
5 V operation
2.0 mA maximum @ 1 Mbps
5.6 mA maximum @ 25 Mbps
18 mA maximum @ 100 Mbps
3.3 V operation
1.1 mA maximum @ 1 Mbps
4.2 mA maximum @ 25 Mbps
8.3 mA maximum @ 50 Mbps
RoHS-compliant, 8-lead SOIC
High common-mode transient immunity: >25 kV/μs
Safety and regulatory approvals
UL recognized: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
APPLICATIONS
Digital fieldbus isolation
Opto-isolator replacement
Computer-peripheral interface
Microprocessor system interface
General instrumentation and data acquisition
GENERAL DESCRIPTION
The ADuM31001 is a digital isolator based on the Analog
Devices, Inc., iCoupler® technology. Combining high speed
CMOS and monolithic transformer technology, this isolation
component provides outstanding performance characteristics
superior to alternatives, such as optocoupler devices.
Configured as a pin-compatible replacement for existing high
speed optocouplers, the ADuM3100 supports data rates as high
as 25 Mbps and 100 Mbps.
The ADuM3100 operates with a voltage supply ranging from 3.0 V
to 5.5 V, boasts a propagation delay of <18 ns and an edge asym-
metry of <2 ns, and is compatible with temperatures up to 105°C. It
operates at very low power, less than 2.0 mA of quiescent current
(sum of both sides), and a dynamic current of less than 160 µA
per Mbps of data rate. Unlike other optocoupler alternatives, the
FUNCTIONAL BLOCK DIAGRAM
VDD1 1
VI 2
(DATA IN)
VDD1 3
ED
NE
CC
OO
DD
EE
8 VDD2
7 GND 2
6 VO
(DATA OUT)
UPDATE
WATCHDOG
GND 1 4
ADuM3100
5 GND 2
NOTES
1. FOR PRINCIPLES OF OPERATION, SEE METHOD OF OPERATION,
DC CORRECTNESS, AND MAGNETIC FIELD IMMUNITY SECTION.
Figure 1.
ADuM3100 provides dc correctness with a patented refresh
feature that continuously updates the output signal.
The ADuM3100 is offered in two grades. The ADuM3100AR
and ADuM3100BR can operate up to a maximum temperature
of 105°C and support data rates up to 25 Mbps and 100 Mbps,
respectively.
In comparison to the ADuM1100 digital isolator, the ADuM3100
contains various circuit and layout changes to provide increased
capability relative to system-level IEC 61000-4-x testing (ESD/
burst/surge). The precise capability in these tests for either the
ADuM1100 or ADuM3100 is strongly determined by the design
and layout of the user’s board or module. For more information,
see the AN-793 Application Note, ESD/Latch-Up Considerations
with iCoupler Isolation Products.
1 Protected by U.S. Patents 5,952,849; 6,525,566; 6,922,080; 6,903,578; 6,873,065; 7,075,329 and other pending patents.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADUM3100 pdf
ADuM3100
Data Sheet
ELECTRICAL SPECIFICATIONS, 3.3 V OPERATION
All voltages are relative to their respective ground. 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V.
Table 2.
Parameter
DC SPECIFICATIONS
Input Supply Current, Quiescent
Output Supply Current, Quiescent
Input Supply Current (25 Mbps)
(See Figure 4)
Output Supply Current1 (25 Mbps)
(See Figure 5)
Input Supply Current (50 Mbps)
(See Figure 4)
Output Supply Current1 (50 Mbps)
(See Figure 5)
Input Current
Logic High Output Voltage
Logic Low Output Voltage
Symbol
IDD1 (Q)
IDD2 (Q)
IDD1 (25)
IDD2 (25)
IDD1 (50)
IDD2 (50)
II
VOH
VOL
Min
−10
VDD2
0.1
VDD2
0.5
SWITCHING SPECIFICATIONS
For ADuM3100ARZ
Minimum Pulse Width2
Maximum Data Rate3
For ADuM3100BRZ
Minimum Pulse Width2
Maximum Data Rate3
For All Grades
Propagation Delay Time to Logic Low
Output4, 5 (See Figure 7)
Propagation Delay Time to Logic High
Output4, 5 (See Figure 7)
Pulse-Width Distortion |tPLH − tPHL|5
Change vs. Temperature6
Propagation Delay Skew (Equal Temperature)5,7
Propagation Delay Skew (Equal Temperature,
Supplies)5, 7
Output Rise/Fall Time
Common-Mode Transient Immunity at
Logic Low/High Output8
Input Dynamic Supply Current9
Output Dynamic Supply Current9
See notes on Page 6.
PW
PW
tPHL
tPLH
PWD
tPSK1
tPSK2
tR, tF
|CML|, |CMH|
IDDI (D)
IDDO (D)
25
50
25
Typ
0.7
0.1
2.6
0.4
4.6
0.7
+0.01
3.3
3.0
0.0
0.04
0.3
10
100
14.5
15.0
0.5
10
3
35
0.08
0.01
Max Unit
0.9 mA
0.2 mA
3.4 mA
0.8 mA
6.6 mA
1.7 mA
+10 μA
V
V
0.1 V
0.1 V
0.4 V
Test Conditions
VI = 0 V or VDD1
VI = 0 V or VDD1
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
25 MHz logic signal freq.,
ADuM3100BRZ only
25 MHz logic signal freq.,
ADuM3100BRZ only
0 V ≤ VIN ≤ VDD1
IO = −20 μA, VI = VIH
IO = −2.5 mA, VI = VIH
IO = 20 μA, VI = VIL
IO = 400 μA, VI = VIL
IO = 2.5 mA, VI = VIL
40 ns
Mbps
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
20 ns
Mbps
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
28 ns
CL = 15 pF, CMOS signal levels
28 ns
CL = 15 pF, CMOS signal levels
3 ns
ps/°C
15 ns
12 ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
ns
kV/µs
mA/Mbps
mA/Mbps
CL = 15 pF, CMOS signal levels
VI = 0 V or VDD1, VCM = 1000 V,
transient magnitude = 800 V
Rev. D | Page 4 of 16

5 Page





ADUM3100 arduino
ADuM3100
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDD11 1
8 VDD2
VI 2 ADuM3100 7 GND22
VDD11 3
TOP VIEW
(Not to Scale)
6 VO
GND1 4
5 GND22
1PIN 1 AND PIN 3 ARE INTERNALLY CONNECTED. IT IS STRONGLY
RECOMMENDED THAT BOTH BE CONNECTED TO VDD1.
2PIN 5 AND PIN 7 ARE INTERNALLY CONNECTED. IT IS STRONGLY
RECOMMENDED THAT BOTH BE CONNECTED TO GND2.
Figure 3. Pin Configuration
Table 11. Pin Function Descriptions
Pin No.
Mnemonic
1 VDD1
2 VI
3 VDD1
4 GND1
5 GND2
6 VO
7 GND2
8 VDD2
Description
Input Supply Voltage, 3.0 V to 5.5 V
Logic Input
Input Supply Voltage, 3.0 V to 5.5 V
Input Ground
Output Ground
Logic Output
Output Ground
Output Supply Voltage, 3.0 V to 5.5 V
Data Sheet
Rev. D | Page 10 of 16

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