ADG791G Datasheet PDF - Analog Devices
| Part Number | ADG791G | |
| Description | (ADG791A / ADG791G) 2:1 Multiplexer | |
| Manufacturers | Analog Devices | |
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I2C-Compatible, Wide Bandwidth,
Quad, 2:1 Multiplexer
ADG791A/ADG791G
FEATURES
Bandwidth: 325 MHz
Low insertion loss and on resistance: 2.6 Ω typical
On resistance flatness: 0.3 Ω typical
Single 3 V/5 V supply operation
3.3 V analog signal range (5 V supply, 75 Ω load)
Low quiescent supply current: 1 nA typical
Fast switching times: tON = 186 ns, tOFF = 177 ns
I2C®-compatible interface
Compact 24-lead LFCSP
ESD protection
4 kV human body model (HBM)
200 V machine model (MM)
1 kV field-induced charged device model (FICDM)
APPLICATIONS
S-video RGB/YPbPr video switches
HDTVs
Projection TVs
DVD-R/RW
AV receivers
GENERAL DESCRIPTION
The ADG791A/ADG791G are monolithic CMOS devices
comprising four 2:1 multiplexers/demultiplexers controllable
via a standard I2C serial interface. The CMOS process provides
ultralow power dissipation yet gives high switching speed and
low on resistance.
The on-resistance profile is very flat over the full analog input
range and wide bandwidth ensures excellent linearity and low
distortion. These features, combined with a wide input signal
range make the ADG791A/ADG791G the ideal switching
solution for a wide range of TV applications including S-video,
RGB, and YPbPr video switches.
The switches conduct equally well in both directions when on.
In the off condition, signal levels up to the supplies are blocked.
The ADG791A/ADG791G switches exhibit break-before-make
switching action. The ADG791G has one general-purpose logic
output pin controlled by the I2C interface that can also be used
to control other non-I2C-compatible devices such as video filters.
The integrated I2C interface provides a large degree of flexibility
in the system design. It has three configurable I2C address pins
FUNCTIONAL BLOCK DIAGRAM
VDD GND
VDD GND
ADG791A
ADG791G
S1A S1A
D1 D1
S1B S1B
S2A S2A
D2 D2
S2B S2B
S3A S3A
D3 D3
S3B S3B
S4A S4A
D4 D4
S4B S4B
I2C SERIAL
INTERFACE
I2C SERIAL
INTERFACE
GPO1
A0 A1 A2 SDA SCL
Figure 1.
A0 A1 A2 SDA SCL
that allow up to eight devices on the same bus. This allows the
user to expand the capability of the device by increasing the size
of the switching array.
The ADG791A/ADG791G operate from a single 3 V or 5 V
supply voltage and is available in a compact 4 mm × 4 mm
body, 24-lead LFCSP.
PRODUCT HIGHLIGHTS
1. Wide bandwidth: 325 MHz.
2. Ultralow power dissipation.
3. Extended input signal range.
4. Integrated I2C serial interface.
5. Compact 4 mm × 4 mm, 24-lead, Pb-free LFCSP.
6. ESD protection tested as per ESD association standards:
4 kV HBM (ANSI/ESD STM5.1-2001)
200 V MM (ANSI/ESD STM5.2-1999)
1 kV FICDM (ANSI/ESDSTM5.3.1-1999)
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
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ADG791A/ADG791G
VDD = 3 V ± 10%, GND = 0 V, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range2
On Resistance, RON
On-Resistance Matching Between
Channels, ∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage (IS (OFF))
Drain Off Leakage (ID (OFF))
Channel On Leakage (ID (ON), IS (ON))
DYNAMIC CHARACTERISTICS3
tON, tENABLE
tOFF, tDISABLE
Break-Before-Make Time Delay, tD
I2C to GPO Propagation Delay, tH, tL
(ADG791G only)
Off Isolation
Channel-to-Channel Crosstalk
Same Multiplexer
Different Multiplexer
−3 dB Bandwidth
THD + N
Charge Injection
CS (OFF)
CD (OFF)
CD (ON), CS (ON)
Power Supply Rejection Ratio, PSRR
Differential Gain Error
Differential Phase Error
LOGIC INPUTS3
A0, A1, A2
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Input Capacitance, CIN
SCL, SDA
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current, IIN
Input Hysteresis
Input Capacitance, CIN
Conditions
VS = VDD, RL = 1 MΩ
VS = VDD, RL = 75 Ω
VD = 0 V, IDS = −10 mA, see Figure 22
VD = 0 V to 1 V, IDS = −10 mA, see Figure 22
VD = 0 V, IDS = −10 mA
VD = 1 V, IDS = −10 mA
VD = 0 V to 1 V, IDS = −10 mA
VD = 2 V/1 V, VS = 1 V/2 V, see Figure 23
VD = 2 V/1 V, VS = 1 V/2 V, see Figure 23
VD = VS = 2 V/1 V, see Figure 24
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V, see Figure 29
f = 10 MHz, RL = 50 Ω, see Figure 26
f = 10 MHz, RL = 50 Ω, see Figure 27
RL = 50 Ω, see Figure 25
RL = 100 Ω
CL = 1 nF, VS = 0 V, see Figure 30
f = 20 kHz
CCIR330 test signal
CCIR330 test signal
VIN = 0 V to VDD
VIN = 0 V to VDD
Min Typ1 Max Unit
0
0
3
2.2 V
1.7 V
4Ω
6Ω
0.15 0.6
1.1
0.8 2.8
Ω
Ω
Ω
±0.25
±0.25
±0.25
nA
nA
nA
198 270 ns
195 260 ns
13
ns
121 ns
−60 dB
−55 dB
−70 dB
310 MHz
0.14 %
2.5 pC
10 pF
13 pF
27 pF
70 dB
0.28 %
0.28 Degrees
2.0
0.8
0.005
±1
3
V
V
μA
pF
0.7 × VDD
−0.3
0.005
0.05 × VDD
3
VDD + 0.3
+0.3 × VDD
±1
V
V
μA
V
pF
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