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PDF ADG1206 Data sheet ( Hoja de datos )
| Número de pieza | ADG1206 | |
| Descripción | (ADG1206 / ADG1207) iCMOS Multiplexers | |
| Fabricantes | Analog Devices | |
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Data Sheet
Low Capacitance, 16- and 8-Channel,
±15 V/+12 V iCMOS Multiplexers
ADG1206/ADG1207
FEATURES
<1 pC charge injection over full signal range
1.5 pF off capacitance
33 V supply range
120 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
28-lead TSSOP and 32-lead, 5 mm × 5 mm LFCSP
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
GENERAL DESCRIPTION
The ADG1206 and ADG1207 are monolithic iCMOS® analog
multiplexers comprising sixteen single channels and eight
differential channels, respectively. The ADG1206 switches one
of sixteen inputs to a common output, as determined by the
4-bit binary address lines A0, A1, A2, and A3. The ADG1207
switches one of eight differential inputs to a common differential
output, as determined by the 3-bit binary address lines A0, A1,
and A2. An EN input on both devices is used to enable or disable
the device. When disabled, all channels are switched off. When
on, each channel conducts equally well in both directions and
has an input signal range that extends to the supplies.
The industrial CMOS (iCMOS) modular manufacturing
process combines high voltage, complementary metal-oxide
semiconductor (CMOS) and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no other generation
of high voltage devices has been able to achieve. Unlike analog
ICs using conventional CMOS processes, iCMOS components
can tolerate high supply voltages while providing increased
performance, dramatically lower power consumption, and
reduced package size.
FUNCTIONAL BLOCK DIAGRAMS
ADG1206
S1
ADG1207
S1A
DA
S8A
D
S1B
DB
S16 S8B
1-OF-16
DECODER
1-OF-8
DECODER
A0 A1 A2 A3 EN
A0 A1 A2 EN
Figure 1.
The ultralow capacitance and exceptionally low charge injection
of these multiplexers make them ideal solutions for data acquisition
and sample-and-hold applications, where low glitch and fast
settling are required. Figure 2 shows that there is minimum
charge injection over the entire signal range of the device.
iCMOS construction also ensures ultralow power dissipation,
making the devices ideally suited for portable and battery-
powered instruments.
1.0
MUX (SOURCE TO DRAIN)
0.9 TA = 25°C
0.8
0.7
0.6
VDD = +15V
0.5 VSS = –15V
0.4
0.3 VDD = +12V
VSS = 0V
0.2
0.1 VDD = +5V
0 VSS = –5V
–15 –10
–5
0
5 10 15
VS (V)
Figure 2. Source-to-Drain Charge Injection vs. Source Voltage
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADG1206/ADG1207
SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.1
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match Between
Channels, ∆RON
On-Resistance Flatness, RFLAT (On)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
−40°C to
+85°C
300
475
5
16
60
±0.02
±0.2
±0.05
±0.2
±0.08
±0.2
567
26
±0.6
±0.6
±0.6
±0.001
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tBBM
3
100
140
80
100
90
110
25
175
120
130
Charge Injection
Off Isolation
0.2
−85
−40°C to
+125°C
0 to VDD
625
27
±1
±2
±2
2.0
0.8
±0.1
200
130
155
15
Channel-to-Channel Crosstalk
−85
−3 dB Bandwidth, ADG1206
−3 dB Bandwidth, ADG1207
CS (Off )
CD (Off ), ADG1206
CD (Off ), ADG1207
CD, CS (On), ADG1206
CD, CS (On), ADG1207
185
300
1.5
2
13
15
9
11
15
17
10
12
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
MHz typ
pF typ
pF max
pF typ
pF max
pF typ
pF max
pF typ
pF max
pF typ
pF max
Test Conditions/Comments
VS = 0 V to10 V, IS = −1 mA; see Figure 28
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −1 mA
VS = 3 V, 6 V, 9 V; IS = −1 mA
VDD = 13.2 V
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 29
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 29
VS = VD = 1 V or 10 V; see Figure 30
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 33
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 33
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V; see Figure 32
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 34
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 35
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 37
RL = 50 Ω, CL = 5 pF; see Figure 36
RL = 50 Ω, CL = 5 pF; see Figure 36
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
Rev. C | Page 5 of 20
5 Page 
Data Sheet
Table 7. ADG1207 Truth Table
A2 A1 A0 EN On Switch Pair
X X X 0 None
00011
00112
01013
01114
10015
10116
11017
11118
ADG1206/ADG1207
Rev. C | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADG1206.PDF ] | |
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