Datenblatt-pdf.com


ADCMP608 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADCMP608
Beschreibung (ADCMP608 / ADCMP609) Single-Supply TTL/CMOS Comparators
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
ADCMP608 Datasheet, Funktion
www.DataSheet4U.com
Rail-to-Rail, Fast, Low Power, 2.5 V to 5.5 V,
Single-Supply TTL/CMOS Comparators
Preliminary Technical Data
ADCMP608/ACMP609
FEATURES
10 mV sensitivity rail to rail at VCC = 2.5 V
Input common-mode voltage from −0.2 V to VCC + 0.2 V
Low glitch CMOS-/TTL-compatible output stage
30 ns propagation delay
1 mW at 2.5 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection >60 dB
−40C° to +125C° operation
APPLICATIONS
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
FUNCTIONAL BLOCK DIAGRAMS
NONINVERTING
INPUT
INVERTING
INPUT
+
ADCMP608
Q OUTPUT
NONINVERTING
INPUT
INVERTING
INPUT
SDN
+
ADCMP609
Q OUTPUT
Q OUTPUT
LE/HYS SDN
Figure 1.
GENERAL DESCRIPTION
The ADCMP608 and ADCMP609 are fast comparators
fabricated on Analog Devices’ proprietary XFCB2 process.
These comparators are exceptionally versatile and easy to use.
Features include an input range from VEE − 0.5 V to VCC + 0.5 V,
low noise, TTL-/CMOS-compatible output drivers, and latch
inputs with adjustable hysteresis and/or shutdown inputs.
The devices offer 30 ns propagation delays driving a 15 pF load
with 5 mV overdrive on 350/400 μA typical supply current. A
flexible power supply scheme allows the devices to operate with
a single +2.5 V positive supply and a −0.5 V to +3.0 V input
signal range up to a +5.5 V positive supply with a −0.5 V to +6V
input signal range. Split input/output supplies, with no
sequencing restrictions on the ADCMP609, support a wide
input signal range while allowing independent output swing
control.
The TTL-/CMOS-compatible output stage is designed to drive
up to 15 pF with full rated timing specs and to degrade in a
graceful and linear fashion as additional capacitance is added.
The comparator input stage offers robust protection against
large input overdrive, and the outputs do not phase reverse
when the valid input signal range is exceeded. High speed latch
and programmable hysteresis features are also provided in a
unique single-pin control option.
The ADCMP608 is available in a tiny 6-lead SC70 package with
single-ended output and a shutdown pin.
The ADCMP609, available in an 8-lead MSOP package, features
a shutdown pin, single pin latch, and hysteresis control.
+
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.






ADCMP608 Datasheet, Funktion
ADCMP608/ADCMP609
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Q1
6 VCC
ADCMP608
VEE 2 TOP VIEW 5 SDN
(Not to Scale)
VP 3
4 VN
VCC 1
8Q
VP 2 ADCMP609 7 Q
TOP VIEW
VN 3 (Not to Scale) 6 VEE
SDN 4
5 LE/HYS
Figure 2. ADCMP608 Pin Configuration
Figure 3. ADCMP609 Pin Configuration
Table 4. ADCMP608 Pin Function Descriptions
Pin No. Mnemonic Description
1Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VN.
2 VEE
Negative Supply Voltage.
3 VP
Noninverting Analog Input.
4 Vn
Inverting Analog Input.
5 SDN
Shutdown. Drive this pin low to shutdown the device.
6 VCC
VCC Supply.
Table 5. ADCMP609 Pin Function Descriptions
Pin No. Mnemonic Description
1
VCCI/VCCO
Vcc Supply.
2 VP
Noninverting Analog Input.
3 Vn
Inverting Analog Input.
4 SDN
Shutdown. Drive this pin low to shutdown the device.
5
LE/HYS
Latch/Hysteresis Control. Bias with resistor or current source for hysteresis; drive TTL low to latch.
6 VEE
Negative Supply Voltage.
7Q
Noninverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VN, provided the comparator is in compare mode.
8Q
Inverting Output. Q is at logic high if the analog voltage at the noninverting input VP is greater than the analog
voltage at the inverting input, VN, provided the comparator is in compare mode.
Rev. PrA | Page 6 of 16

6 Page









ADCMP608 pdf, datenblatt
ADCMP608/ADCMP609
TYPICAL APPLICATION CIRCUITS
0.1µF
2.5V TO 5V
INPUT
2k2kADCMP608
0.1µF
OUTPUT
Figure 18. Self-Biased 50% Slicer
LVDS 100
ADCMP608
CMOS
VDD
2.5V TO 5V
OUTPUT
Figure 19. LVDS to CMOS Receiver
39k
5V
20k
39k
ADCMP609
470pF
LE/HYS
OUTPUT
CONTROL
VOLTAGE
0V TO 2.5V
150k
150k
Figure 20. Voltage Controlled Oscillator
Preliminary Technical Data
2.5V
INPUT
1.25V
±50mV
ADCMP608
CMOS
PWM
OUTPUT
INPUT
1.25V
REF
10k
10k
10k
ADCMP609
220pF
LE/HYS
100k
Figure 21. Oscillator and Pulse Width Modulator
5V
INPUT
VREF
10k
ADCMP609 0.02µF
0.1µF
LE/HYS
10k
+
OUTPUT
Figure 22. Duty Cycle to Differential Voltage
2.5V TO 5V
ADCMP609
DIGITAL
INPUT
74AHC
1G07
LE/HYS
HYSTERESIS
CURRENT
10k
Figure 23. DAC Hysteresis Adjustment with Latch
Rev. PrA | Page 12 of 16

12 Page





SeitenGesamt 16 Seiten
PDF Download[ ADCMP608 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
ADCMP600(ADCMP600 - ADCMP602) Single-Supply TTL/CMOS ComparatorAnalog Devices
Analog Devices
ADCMP601(ADCMP600 - ADCMP602) Single-Supply TTL/CMOS ComparatorAnalog Devices
Analog Devices
ADCMP602(ADCMP600 - ADCMP602) Single-Supply TTL/CMOS ComparatorAnalog Devices
Analog Devices
ADCMP603Single-Supply TTL/CMOS ComparatorAnalog Devices
Analog Devices
ADCMP604(ADCMP604 / ADCMP605) Single-Supply LVDS ComparatorsAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche