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ADCMP604 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADCMP604
Beschreibung (ADCMP604 / ADCMP605) Single-Supply LVDS Comparators
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
ADCMP604 Datasheet, Funktion
www.DataSheet4U.com
Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,
Single-Supply LVDS Comparators
ADCMP604/ADCMP605
FEATURES
Fully specified rail to rail at VCC = 2.5 V to 5.5 V
Input common-mode voltage from −0.2 V to VCC + 0.2 V
Low glitch LVDS-compatible output stage
1.6 ns propagation delay
37 mW at 2.5 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection > 60 dB
−40°C to +125°C operation
APPLICATIONS
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
Pulse spectroscopy
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
Automatic test equipment (ATE)
GENERAL DESCRIPTION
The ADCMP604 and ADCMP605 are very fast comparators
fabricated on Analog Devices, Inc.’s, proprietary XFCB2
process. This family of comparators is exceptionally versatile
and easy to use. Features include an input range from VEE − 0.5
V to VCC + 0.2 V, low noise, LVDS-compatible output drivers,
and TTL/CMOS latch inputs with adjustable hysteresis and/or
shutdown inputs.
The devices offer 1.5 ns propagation delays with 1 ps rms
random jitter (RJ). Overdrive and slew rate dispersion are
typically less than 50 ps.
A flexible power supply scheme allows the devices to operate
with a single +2.5 V positive supply and a −0.5 V to +3.0 V
input signal range up to a +5.5 V positive supply with a −0.5 V
FUNCTIONAL BLOCK DIAGRAM
VCCI
VCCO
(ADCMP605 ONLY)
VP
NONINVERTING
INPUT
VN
INVERTING
INPUT
ADCMP604/
ADCMP605
LVDS
Q OUTPUT
Q OUTPUT
LE/HYS INPUT (ADCMP605
SDN INPUT
ONLY)
Figure 1.
to +6 V input signal range. Split input/output supplies, with no
sequencing restrictions on the ADCMP605, support a wide
input signal range with greatly reduced power consumption.
The LVDS-compatible output stage is designed to drive any
standard LVDS input. The comparator input stage offers robust
protection against large input overdrive, and the outputs do not
phase reverse when the valid input signal range is exceeded.
High speed latch and programmable hysteresis features are also
provided in a unique single-pin control option.
The ADCMP604 is available in a 6-lead SC70 package. The
ADCMP605 is available in a 12-lead LFCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.






ADCMP604 Datasheet, Funktion
ADCMP604/ADCMP605
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltages
Input Supply Voltage (VCCI to GND)
Output Supply Voltage
(VCCO to GND)
Positive Supply Differential
(VCCI − VCCO)
Input Voltages
Input Voltage
Differential Input Voltage
Maximum Input/Output Current
Shutdown Control Pin
Applied Voltage (HYS to GND)
Maximum Input/Output Current
Latch/Hysteresis Control Pin
Applied Voltage (HYS to GND)
Maximum Input/Output Current
Output Current
Temperature
Operating Temperature, Ambient
Operating Temperature, Junction
Storage Temperature Range
Rating
−0.5 V to +6.0 V
−0.5 V to +6.0 V
−6.0 V to +6.0 V
−0.5 V to VCCI + 0.5 V
±(VCCI + 0.5 V)
±50 mA
−0.5 V to VCCO + 0.5 V
±50 mA
−0.5 V to VCCO + 0.5 V
±50 mA
±50 mA
−40°C to +125°C
150°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
ADCMP604 6-lead SC70
ADCMP605 12-lead LFCSP
1 Measurement in still air.
θJA1 Unit
426 °C/W
62 °C/W
ESD CAUTION
Rev. 0 | Page 6 of 16

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ADCMP604 pdf, datenblatt
ADCMP604/ADCMP605
250
200
150
100
VCC = 2.5V
50
VCC = 5.5V
0
50 100 150 200 250 300 350 400 450
HYSTERESIS RESISTOR (k)
Figure 20. Hysteresis vs. RHYS Control Resistor
500
CROSSOVER BIAS POINTS
Rail-to-rail inputs of this type, in both op amps and
comparators, have a dual front-end design. Certain devices are
active near the VCC rail and others are active near the VEE rail. At
some predetermined point in the common-mode range, a
crossover occurs. At this point, normally VCC/2, the direction of
the bias current reverses and there are changes in measured offset
voltages and currents.
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PC Board
design practice, as discussed in the Optimizing Performance
section, these comparators should be stable at any input slew
rate with no hysteresis. Broadband noise from the input stage is
observed in place of the violent chattering seen with most other
high speed comparators. With additional capacitive loading or
poor bypassing, oscillation is observed. This oscillation is due to
the high gain bandwidth of the comparator in combination with
feedback parasitics in the package and PC board. In many
applications, chattering is not harmful.
Rev. 0 | Page 12 of 16

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