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EM78P350N Schematic ( PDF Datasheet ) - ELAN Microelectronics

Teilenummer EM78P350N
Beschreibung 8-Bit Microprocessor
Hersteller ELAN Microelectronics
Logo ELAN Microelectronics Logo 




Gesamt 30 Seiten
EM78P350N Datasheet, Funktion
www.DataSheet4U.com
EM78P350N
8-Bit Microprocessor
with OTP ROM
Product
Specification
DOC. VERSION 1.0
ELAN MICROELECTRONICS CORP.
September 2006






EM78P350N Datasheet, Funktion
Contents
6.16 Code Option ..................................................................................................... 85
6.16.1 Code Option Register (Word 0).........................................................................85
6.16.2 Code Option Register (Word 1).........................................................................87
6.15.3 Customer ID Register (Word 2).........................................................................88
6.17 Instruction Set ................................................................................................. 88
7 Absolute Maximum Ratings ................................................................................... 90
8 DC Electrical Characteristics ................................................................................. 91
8.1 AD Converter Characteristic............................................................................. 92
8.2 Comparator (OP) Characteristic ....................................................................... 92
8.3 Device Characteristics...................................................................................... 93
9 AC Electrical Characteristic ................................................................................... 94
10 Timing Diagrams ..................................................................................................... 95
APPENDIX
A Package Type........................................................................................................... 96
B Packaging Configurations...................................................................................... 96
B.1 28-Lead Plastic Dual in line (PDIP) — 600 mil ................................................. 96
B.2 28-Lead Plastic Small Outline (SOP) — 300 mil .............................................. 97
B.3 28-Lead Plastic Dual in line (PDIP) — 400 mil ................................................ 98
B.4 28-Lead Plastic Dual in line (PDIP) — 300 mil ................................................ 99
B.5 32-LQFP — 7x7m2 ....................................................................................... 100
B.6 32-Lead Plastic Dual in line (PDIP) —400 mil ................................................ 101
B.7 32-Lead Plastic Dual in line (PDIP) —600 mil ................................................ 102
B.8 32-Lead Plastic Small Outline (SOP) — 300 mil ............................................ 103
C Quality Assurance and Reliability ..................................................................... 104
C.1 Address Trap Detect....................................................................................... 104
Doc. Version
1.0
Specification Revision History
Revision Description
Preliminary version
Date
2006/09/14
viProduct Specification (V1.0) 09.14.2006

6 Page









EM78P350N pdf, datenblatt
EM78P350N
8-Bit Microprocessor with OTP ROM
6 Function Description
6.1 Operational Registers
6.1.1 R0 (Indirect Address Register)
R0 is not a physically implemented register. Its major function is to perform as an
indirect address pointer. Any instruction using R0 as a pointer, actually accesses the
data pointed by the RAM Select Register (R4).
6.1.2 R1 (Time Clock/Counter)
„ Incremented by an external signal edge through the TCC pin, or by the instruction
cycle clock.
„ External signal of TCC trigger pulse width must be greater than one instruction.
„ The signals to increment the counter are determined by Bit 4 and Bit 5 of the CONT
register.
„ Writable and readable as any other registers.
6.1.3 R2 (Program Counter) and Stack
PC (A12 ~ A0)
Reset Vector
Interrupt Vector
000H
008H
Stack Level 1
Stack Level 2
Stack Level 3
On-chip Program
Memory
Stack Level 8
Fig. 6-1 Program Counter Organization
1FFFH
„ R2 and hardware stacks are 12-bit wide. The structure is depicted in the table
under Section 6.1.3.1 Data Memory Configuration (next section).
„ Generates 8K×13 bits on-chip ROM addresses to the relative programming
instruction codes. One program page is 1024 words long.
„ The contents of R2 are all set to "0"s when a RESET condition occurs.
„ "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows PC to jump to any location within a page.
6 Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)

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