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PDF PE4231 Data sheet ( Hoja de datos )
| Número de pieza | PE4231 | |
| Descripción | SPDT High Power UltraCMOS | |
| Fabricantes | Peregrine Semiconductor | |
| Logotipo |  |
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Product Description
The PE4231 SPDT High Power UltraCMOS™ RF Switch is
designed to cover a broad range of applications from DC to 1.3
GHz. This single-supply reflective switch integrates on-board
CMOS control logic driven by a simple, single-pin CMOS or
TTL compatible control input. Using a nominal +3-volt power
supply, a typical input 1 dB compression point of +32 dBm can
be achieved. The PE4231 also exhibits input-output isolation of
better than 42 dB at 1.0 GHz and is offered in a small 8-lead
MSOP package.
The PE4231 SPDT High Power UltraCMOS™ RF Switch is
manufactured in Peregrine’s patented Ultra Thin Silicon
(UTSi®) CMOS process, offering the performance of GaAs with
the economy and integration of conventional CMOS.
Product Specification
PE4231
SPDT High Power UltraCMOS™
DC – 1.3 GHz RF Switch
Features
• Optimized for 75 Ω systems
• Single +3-volt power supply
• Low insertion loss: 0.80 dB at 1.0 GHz
• High isolation: 42 dB at 1.0 GHz
• Typical input 1 dB compression point of
+32 dBm
• Single-pin CMOS or TTL logic control
• Low cost
Figure 1. Functional Diagram
RFCommon
Figure 2. Package Type
8-lead MSOP
RF1 RF2
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 75 Ω)
Parameter
Operation Frequency1
Insertion Loss
Isolation – RFCommon to
RF1/RF2
Isolation – RF1 to RF2
Return Loss
‘ON’ Switching Time
‘OFF’ Switching Time
Video Feedthrough2
Input 1 dB Compression3
Input IP33
Conditions
50 MHz
1000 MHz
50 MHz
1000 MHz
50 MHz
1000 MHz
1000 MHz
CTRL to 0.1 dB final value, 2 GHz
CTRL to 25 dB isolation, 2 GHz
1000 MHz
1000 MHz, 17 dBm
Minimum
DC
73
40
58
33
16
30
50
Typical
0.50
0.80
75
42
60
35
17
2000
900
15
32
Maximum
1300
0.60
0.90
Units
MHz
dB
dB
dB
dB
ns
ns
mVpp
dBm
dBm
Notes:
1. Device linearity will begin to degrade below 1 MHz.
2. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
3. Measured in a 50 Ω system.
Document No. 70-0097-01 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
1 page  
PE4231
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4231 SPDT switch. The RF common port is
connected through a 75 Ω transmission line to the
top left BNC connector, J1. Port 1 and Port 2 are
connected through 75 Ω transmission lines to the
top two BNC connectors on the right side of the
board, J2 and J3. A through transmission line
connects BNC connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.021”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0014” and εr of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device CNTL input. The fourth pin to the
right (J6-7) is connected to the device VDD input.
A decoupling capacitor (100 pF) is provided on
both CNTL and VDD traces. It is the responsibility
of the customer to determine proper supply
decoupling for their design application. Removing
these components from the evaluation board has
not been shown to degrade RF performance.
Figure 8. Evaluation Board Layouts
Figure 9. Evaluation Board Schematic
J6-7
100 pF
Optional
J6-3
100 pF
Optional
VDD
CNTL
GND
RF1
GND
GND
J2
RFC
RF2
J1 J3
Document No. 70-0097-01 │ www.psemi.com
J5 J4
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PE4231.PDF ] | |
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