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AD7746 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7746
Beschreibung (AD7745 / AD7746) 24-Bit Capacitance-to-Digital Converter
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD7746 Datasheet, Funktion
www.DataSheet4U.com
24-Bit Capacitance-to-Digital Converter
with Temperature Sensor
AD7745/AD7746
FEATURES
GENERAL DESCRIPTION
Capacitance-to-digital converter
New standard in single chip solutions
Interfaces to single or differential floating sensors
Resolution down to 4 aF (that is, up to 21 ENOB)
Accuracy: 4 fF
Linearity: 0.01%
Common-mode (not changing) capacitance up to 17 pF
Full-scale (changing) capacitance range: ±4 pF
Tolerant of parasitic capacitance to ground up to 60 pF
Update rate: 10 Hz to 90 Hz
Simultaneous 50 Hz and 60 Hz rejection at 16 Hz
The AD7745/AD7746 are a high resolution, Σ-Δ capacitance-to-
digital converter (CDC). The capacitance to be measured is
connected directly to the device inputs. The architecture fea-
tures inherent high resolution (24-bit no missing codes, up to
21-bit effective resolution), high linearity (±0.01%), and high
accuracy (±4 fF factory calibrated). The AD7745/AD7746
capacitance input range is ±4 pF (changing), while it can accept
up to 17 pF common-mode capacitance (not changing), which
can be balanced by a programmable on-chip, digital-to-
capacitance converter (CAPDAC).
Temperature sensor on-chip
Resolution: 0.1°C, accuracy: ±2°C
Voltage input channel
Internal clock oscillator
2-wire serial interface (I2C®-compatible)
Power
2.7 V to 5.25 V single-supply operation
0.7 mA current consumption
Operating temperature: –40°C to +125°C
16-lead TSSOP package
The AD7745 has one capacitance input channel, while the
AD7746 has two channels. Each channel can be configured as
single-ended or differential. The AD7745/AD7746 are designed
for floating capacitive sensors. For capacitive sensors with one
plate connected to ground, the AD7747 is recommended.
The parts have an on-chip temperature sensor with a resolution
of 0.1°C and accuracy of ±2°C. The on-chip voltage reference
and the on-chip clock generator eliminate the need for any
external components in capacitive sensor applications. The
APPLICATIONS
parts have a standard voltage input, which together with the
differential reference input allows easy interface to an external
Automotive, industrial, and medical systems for
Pressure measurement
Position sensing
Level sensing
Flowmeters
Humidity sensing
Impurity detection
temperature sensor, such as an RTD, thermistor, or diode.
The AD7745/AD7746 have a 2-wire, I2C-compatible serial
interface. Both parts can operate with a single power supply
from 2.7 V to 5.25 V. They are specified over the automotive
temperature range of –40°C to +125°C and are housed in a
16-lead TSSOP package.
FUNCTIONAL BLOCK DIAGRAMS
VDD
VDD
VIN(+)
VIN(–)
CIN1(+)
CIN1(–)
TEMP
SENSOR
CLOCK
GENERATOR
AD7745
MUX
24-BIT Σ-
MODULATOR
DIGITAL
FILTER
I2C
SERIAL
INTERFACE
SDA
SCL
CAP DAC
CONTROL LOGIC
CALIBRATION
RDY
VIN(+)
VIN(–)
CIN1(+)
CIN1(–)
CIN2(+)
CIN2(–)
TEMP
SENSOR
CLOCK
GENERATOR
AD7746
MUX
24-BIT Σ-
MODULATOR
DIGITAL
FILTER
I2C
SERIAL
INTERFACE
SDA
SCL
CAP DAC
CONTROL LOGIC
CALIBRATION
RDY
EXCA
EXCB
CAP DAC
EXCITATION
VOLTAGE
REFERENCE
EXC1
EXC2
CAP DAC
EXCITATION
VOLTAGE
REFERENCE
REFIN(+) REFIN(–)
Figure 1.
GND
REFIN(+) REFIN(–)
Figure 2.
GND
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.






AD7746 Datasheet, Funktion
AD7745/AD7746
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Positive Supply Voltage VDD to GND
Voltage on any Input or Output Pin to
GND
ESD Rating (ESD Association Human Body
Model, S5.1)
Operating Temperature Range
Storage Temperature Range
Junction Temperature
TSSOP Package θJA,
(Thermal Impedance-to-Air)
TSSOP Package θJC,
(Thermal Impedance-to-Case)
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
0.3 V to +6.5 V
–0.3 V to VDD + 0.3 V
2000 V
–40°C to +125°C
–65°C to +150°C
150°C
128°C/W
14°C/W
215°C
220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 6 of 28

6 Page









AD7746 pdf, datenblatt
AD7745/AD7746
SERIAL INTERFACE
The AD7745/AD7746 supports an I2C-compatible 2-wire serial
interface. The two wires on the I2C bus are called SCL (clock)
and SDA (data). These two wires carry all addressing, control,
and data information one bit at a time over the bus to all
connected peripheral devices. The SDA wire carries the data,
while the SCL wire synchronizes the sender and receiver during
the data transfer. I2C devices are classified as either master or
slave devices. A device that initiates a data transfer message is
called a master, while a device that responds to this message is
called a slave.
To control the AD7745/AD7746 device on the bus, the
following protocol must be followed. First, the master initiates a
data transfer by establishing a start condition, defined by a
high-to-low transition on SDA while SCL remains high. This
indicates that the start byte follows. This 8-bit start byte is made
up of a 7-bit address plus an R/W bit indicator.
All peripherals connected to the bus respond to the start
condition and shift in the next 8 bits (7-bit address + R/W bit).
The bits arrive MSB first. The peripheral that recognizes the
transmitted address responds by pulling the data line low
during the ninth clock pulse. This is known as the acknowledge
bit. All other devices withdraw from the bus at this point and
maintain an idle condition. An exception to this is the general
call address, which is described later in this document. The idle
condition is where the device monitors the SDA and SCL lines
waiting for the start condition and the correct address byte. The
R/W bit determines the direction of the data transfer. A Logic 0
LSB in the start byte means that the master writes information
to the addressed peripheral. In this case the AD7745/AD7746
becomes a slave receiver. A Logic 1 LSB in the start byte means
that the master reads information from the addressed peri-
pheral. In this case, the AD7745/AD7746 becomes a slave
transmitter. In all instances, the AD7745/AD7746 acts as a
standard slave device on the I2C bus.
The start byte address for the AD7745/AD7746 is 0x90 for a
write and 0x91 for a read.
READ OPERATION
When a read is selected in the start byte, the register that is
currently addressed by the address pointer is transmitted on to
the SDA line by the AD7745/AD7746. This is then clocked out
by the master device and the AD7745/AD7746 awaits an
acknowledge from the master.
If an acknowledge is received from the master, the address auto-
incrementer automatically increments the address pointer
register and outputs the next addressed register content on to
the SDA line for transmission to the master. If no acknowledge
is received, the AD7745/AD7746 return to the idle state and the
address pointer is not incremented.
The address pointers’ auto-incrementer allow block data to be
written or read from the starting address and subsequent
incremental addresses.
In continuous conversion mode, the address pointers’ auto-
incrementer should be used for reading a conversion result.
That means, the three data bytes should be read using one
multibyte read transaction rather than three separate single byte
transactions. The single byte data read transaction may result in
the data bytes from two different results being mixed. The same
applies for six data bytes if both the capacitive and the
voltage/temperature channel are enabled.
The user can also access any unique register (address) on a one-
to-one basis without having to update all the registers. The
address pointer register contents cannot be read.
If an incorrect address pointer location is accessed or, if the user
allows the auto-incrementer to exceed the required register
address, the following applies:
In read mode, the AD7745/AD7746 continues to output
various internal register contents until the master device
issues a no acknowledge, start, or stop condition. The
address pointers’ auto-incrementer’s contents are reset to
point to the status register at Address 0x00 when a stop
condition is received at the end of a read operation. This
allows the status register to be read (polled) continually
without having to constantly write to the address pointer.
In write mode, the data for the invalid address is not loaded
into the AD7745/AD7746 registers but an acknowledge is
issued by the AD7745/AD7746.
WRITE OPERATION
When a write is selected, the byte following the start byte is
always the register address pointer (subaddress) byte, which
points to one of the internal registers on the AD7745/ AD7746.
The address pointer byte is automatically loaded into the
address pointer register and acknowledged by the AD7745/
AD7746. After the address pointer byte acknowledge, a stop
condition, a repeated start condition, or another data byte can
follow from the master.
A stop condition is defined by a low-to-high transition on SDA
while SCL remains high. If a stop condition is ever encountered
by the AD7745/AD7746, it returns to its idle condition and the
address pointer is reset to Address 0x00.
If a data byte is transmitted after the register address pointer
byte, the AD7745/AD7746 load this byte into the register that is
currently addressed by the address pointer register, send an
acknowledge, and the address pointer auto-incrementer auto-
matically increments the address pointer register to the next
internal register address. Thus, subsequent transmitted data
bytes are loaded into sequentially incremented addresses.
Rev. 0 | Page 12 of 28

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