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AD7764 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7764
Beschreibung 109 dB Sigma-Delta ADC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
AD7764 Datasheet, Funktion
24-Bit, 312 kSPS, 109 dB Sigma-Delta ADC
with On-Chip Buffers and Serial Interface
AD7764
FEATURES
High performance 24-bit ∑-∆ ADC
115 dB dynamic range at 78 kHz output data rate
109 dB dynamic range at 312 kHz output data rate
312 kHz maximum fully filtered output word rate
Pin-selectable oversampling rate (64×, 128×, and 256×)
Low power mode
Flexible SPI
Fully differential modulator input
On-chip differential amplifier for signal buffering
On-chip reference buffer
Full band low-pass finite impulse response (FIR) filter
Overrange alert pin
Digital gain correction registers
Power-down mode
Synchronization of multiple devices via SYNC pin
Daisy chaining
APPLICATIONS
Data acquisition systems
Vibration analysis
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
VOUTA– VOUTA+ VIN+ VIN
MCLK GND
VINA+
VINA–
DIFF
VREF+
BUF
MULTIBIT
Σ-Δ
MODULATOR
RECONSTRUCTION
AVDD1
AVDD2
AVDD3
AVDD4
DVDD
OVERRANGE
REFGND
SYNC
RESET/PWRDWN
INTERFACE LOGIC AND
OFFSET AND GAIN
CORRECTION REGISTERS
DECIMATION
FIR FILTER ENGINE
AD7764
FSO SCO SDI SDO FSI
Figure 1.
DEC_RATE
RBIAS
Table 1. Related Devices
Part No. Description
AD7760 2.5 MSPS, 100 dB, parallel output on-chip buffers
AD7762 625 kSPS, 109 dB, parallel output on-chip buffers
AD7763 625 kSPS, 109 dB, serial output, on-chip buffers
AD7765 156 kSPS, 112 dB, serial output, on-chip buffers
AD7766 128/64/32 kSPS, 8.5 mW, 109 dB SNR
AD7767 128/64/32 kSPS, 8.5 mW, 109 dB SNR
GENERAL DESCRIPTION
The AD7764 is a high performance, 24-bit sigma-delta (Σ-Δ)
analog-to-digital converter (ADC). It combines wide input
bandwidth, high speed, and performance of 109 dB dynamic
range at a 312 kHz output data rate. With excellent dc
specifications, the converter is ideal for high speed data
acquisition of ac signals where dc data is also required.
Using the AD7764 eases the front-end antialias filtering
requirements, simplifying the design process significantly. The
AD7764 offers pin-selectable decimation rates of 64×, 128×,
and 256×. Other features include an integrated buffer to drive
the reference, as well as a fully differential amplifier to buffer
and level shift the input to the modulator.
An overrange alert pin indicates when an input signal has
exceeded the acceptable range. The addition of internal gain
and internal overrange registers makes the AD7764 a compact,
highly integrated data acquisition device requiring minimal
peripheral components.
The AD7764 also offers a low power mode, significantly
reducing power dissipation without reducing the output data
rate or available input bandwidth.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of
low-pass filters. The external clock frequency applied to the
AD7764 determines the sample rate, filter corner frequencies,
and output word rate.
The AD7764 device boasts a full band on-board FIR filter. The
full stop-band attenuation of the filter is achieved at the Nyquist
frequency. This feature offers increased protection from signals
that lie above the Nyquist frequency being aliased back into the
input signal bandwidth.
The reference voltage supplied to the AD7764 determines the
input range. With a 4 V reference, the analog input range is
±3.2768 V differential, biased around a common mode of
2.048 V. This common-mode biasing can be achieved using
the on-chip differential amplifier, further reducing the external
signal conditioning requirements.
The AD7764 is available in a 28-lead TSSOP package and is
specified over the industrial temperature range of −40°C
to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007-2009 Analog Devices, Inc. All rights reserved.






AD7764 Datasheet, Funktion
AD7764
Parameter
REFERENCE INPUT/OUTPUT
VREF+ Input Voltage
VREF+ Input DC Leakage Current
VREF+ Input Capacitance
DIGITAL INPUT/OUTPUT
MCLK Input Amplitude
Input Capacitance
Input Leakage Current
VINH
VINL
VOH4
VOL
ON-CHIP DIFFERENTIAL AMPLIFIER
Input Impedance
Bandwidth for 0.1 dB Flatness
Common-Mode Input Voltage
Common-Mode Output Voltage
POWER REQUIREMENTS
AVDD1 (Modulator Supply)
AVDD2 (General Supply)
AVDD3 (Differential Amplifier Supply)
AVDD4 (Ref Buffer Supply)
DVDD
Normal Power Mode
AIDD1 (Modulator)
AIDD2 (General)5
AIDD3 (Differential Amplifier)
AIDD4 (Reference Buffer)
DIDD5
Low Power Mode
AIDD1 (Modulator)
AIDD2 (General) 5
AIDD3 (Differential Amplifier)
AIDD4 (Reference Buffer)
DIDD5
POWER DISSIPATION
Normal Power Mode
Low Power Mode
Power-Down Mode6
Test Conditions/Comments
AVDD3 = 5 V ± 5%
Voltage range at input pins: VINA+ and VINA−
On-chip differential amplifier pins: VOUTA+ and VOUTA−
±5%
±5%
±5%
±5%
±5%
MCLK = 40 MHz
AVDD3 = 5 V
AVDD4 = 5 V
MCLK = 40 MHz
MCLK = 40 MHz
AVDD3 = 5 V
AVDD4 = 5 V
MCLK = 40 MHz
MCLK = 40 MHz, decimate 64×
MCLK = 40 MHz, decimate 64×
PWRDWN held logic low
Specification
4.096
±1
5
2.25 to 5.25
7.3
±1
0.8 × DVDD
0.2 × DVDD
2.2
0.1
>1
125
−0.5 to +2.2
2.048
2.5
5
5
5
2.5
19
13
10
9
37
10
7
5.5
5
20
300
371
160
215
1
1 See the Terminology section.
2 SNR specifications in decibels are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
3 Output data rate (ODR) = [(MCLK/2)]/decimation rate. That is, the maximum ODR for AD7764 = [(40 MHz)/2)/64] = 312.5 kHz.
4 Tested with a 400 µA load current.
5 Tested at MCLK = 40 MHz. This current scales linearly with the MCLK frequency applied.
6 Tested at 125°C.
Unit
V
µA max
pF typ
V
pF typ
μA/pin max
V min
V max
V min
V max
kHz
V
V
V
V
V min/max
V min/max
V
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mW typ
mW max
mW typ
mW max
mW typ
Rev. A | Page 5 of 32

6 Page









AD7764 pdf, datenblatt
AD7764
TYPICAL PERFORMANCE CHARACTERISTICS
AVDD1 = DVDD = 2.5 V, AVDD2 = AVDD3 = AVDD4 = 5 V, VREF+ = 4.096 V, MCLK amplitude = 5 V, TA = 25°C. Linearity plots measured to
16-bit accuracy. Input signal reduced to avoid modulator overload and digital clipping; fast Fourier transforms (FFTs) of −0.5 dB tones are
generated from 262,144 samples in normal power mode. All other FFTs are generated from 8192 samples.
00
–25 –25
–50 –50
–75 –75
–100
–100
–125
–125
–150
–150
–175
0
50k 100k
FREQUENCY (Hz)
156.249k
Figure 6. Normal Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
64× Decimation Rate
0
–175
0
25k
50k
75k
100k
125k
150k
FREQUENCY (Hz)
Figure 9. Low Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
64× Decimation Rate
0
–25 –25
–50 –50
–75 –75
–100
–100
–125
–125
–150
–150
–175
0
20k 40k 60k
FREQUENCY (Hz)
78.124k
Figure 7. Normal Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
128× Decimation Rate
0
–175
0
10k 20k 30k 40k 50k 60k 70k
FREQUENCY (Hz)
Figure 10. Low Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
128× Decimation Rate
0
–25 –25
–50 –50
–75 –75
–100
–100
–125
–125
–150
–150
–175
0
10k 20k 30k
FREQUENCY (Hz)
39.062k
Figure 8. Normal Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
256× Decimation Rate
–175
0
5k 10k 15k 20k 25k 30k 35k
FREQUENCY (Hz)
Figure 11. Low Power Mode, FFT,1 kHz, −0.5 dB Input Tone,
256× Decimation Rate
Rev. A | Page 11 of 32

12 Page





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