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PDF ADM3490E Data sheet ( Hoja de datos )
| Número de pieza | ADM3490E | |
| Descripción | (ADM3483E - ADM3491E) low power data transceivers | |
| Fabricantes | Analog Devices | |
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3.3 V, ±15 kV ESD-Protected, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
Data rates
ADM3483E/ADM3488E: 250 kbps
ADM3486E: 2.5 Mbps
ADM3490E/ADM3491E: 12 Mbps
Half- and full-duplex options
Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design
Low power shutdown current
(ADM3483E/ADM3486E/ADM3491E only)
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
Industry-standard 75176 pinout
8-lead and 14-lead narrow SOIC packages
APPLICATIONS
Power/energy metering
Telecommunications
EMI-sensitive systems
Industrial control
Local area networks
GENERAL DESCRIPTION
The ADM3483E/ADM3486E/ADM3488E/ADM3490E/
ADM3491E are 3.3 V, low power data transceivers with
±15 kV ESD protection suitable for full- and half-duplex
communication on multipoint bus transmission lines. They
are designed for balanced data transmission, and they
comply with TIA/EIA standards RS485 and RS-422. The
ADM3483E/ADM3486E are half-duplex transceivers that
share differential lines and have separate enable inputs for
the driver and receiver. The full-duplex ADM3488E/
ADM3490E/ADM3491E transceivers have dedicated
differential line driver outputs and receiver inputs. The
ADM3491E also features separate enable inputs for the
driver and receiver.
The devices have a 12 kΩ receiver input impedance,
which allows up to 32 transceivers on a bus. Because only
one driver should be enabled at any time, the output of a
disabled or powered-down driver is tristated to avoid
overloading the bus.
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM3483E/
ADM3486E
RO R
RE
DE
DI D
A
B
GND
Figure 1.
VCC
ADM3488E/
ADM3490E
A
RO
R
B
DI D
Z
Y
GND
Figure 2.
VCC
ADM3491E
RO R
RE
DE
DI D
A
B
Z
Y
GND
Figure 3.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
(continued on Page 3)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
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ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
DRIVER TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C.
Table 3. ADM3483E/ADM3488E
Parameter
MAXIMUM DATA RATE
DIFFERENTIAL OUTPUT DELAY
DIFFERENTIAL OUTPUT TRANSITION TIME
PROPAGATION DELAY
From Low to High Level
From High to Low Level
|tPLH − tPHL| PROPAGATION DELAY SKEW1
ENABLE/DISABLE TIMING (ADM3483E ONLY)
Enable Time to Low Level
Enable Time to High Level
Disable Time from Low Level
Disable Time from High Level
Enable Time from Shutdown to Low Level
Enable Time from Shutdown to High Level
1 Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|.
VCC = 3.3 V, TA = 25°C.
Table 4. ADM3486E
Parameter
MAXIMUM DATA RATE
DIFFERENTIAL OUTPUT DELAY
DIFFERENTIAL OUTPUT TRANSITION TIME
PROPAGATION DELAY
From Low to High Level
From High to Low Level
|tPLH − tPHL| PROPAGATION DELAY SKEW1
ENABLE/DISABLE TIMING
Enable Time to Low Level
Enable Time to High Level
Disable Time from Low Level
Disable Time from High Level
Enable Time from Shutdown to Low Level
Enable Time from Shutdown to High Level
1 Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|.
Symbol
tDD
tTD
tPLH
tPHL
tPDS
tPZL
tPZH
tPLZ
tPHZ
tPSL
tPSH
Min Typ
250
600 900
400 740
Max
1400
1200
Unit
kbps
ns
ns
700 930 1500 ns
700 930 1500 ns
±50 ns
900 1300 ns
600 800 ns
50 80 ns
50 80 ns
1.9 2.7 μs
2.2 3.0 μs
Test Conditions/Comments
RL = 60 Ω (see Figure 10)
RL = 60 Ω (see Figure 10)
RL = 27 Ω (see Figure 11)
RL = 27 Ω (see Figure 11)
RL = 27 Ω (see Figure 11)
RL = 110 Ω (see Figure 13)
RL = 110 Ω (see Figure 12)
RL = 110 Ω (see Figure 13)
RL = 110 Ω (see Figure 12)
RL = 110 Ω (see Figure 13)
RL = 110 Ω (see Figure 12)
Symbol
tDD
tTD
Min Typ Max
2.5
20 42 70
15 28 60
Unit
Mbps
ns
ns
Test Conditions/Comments
RL = 60 Ω (see Figure 10)
RL = 60 Ω (see Figure 10)
tPLH
20 42 75
ns
RL = 27 Ω (see Figure 11)
tPHL
20 42 75
ns
RL = 27 Ω (see Figure 11)
tPDS
−6 ±12 ns
RL = 27 Ω (see Figure 11)
tPZL
52 100 ns
RL = 110 Ω (see Figure 13)
tPZH
52 100 ns
RL = 110 Ω (see Figure 12)
tPLZ
40 80
ns
RL = 110 Ω (see Figure 13)
tPHZ
40 80
ns
RL = 110 Ω (see Figure 12)
tPSL
700 1000 ns
RL = 110 Ω (see Figure 13)
tPSH
700 1000 ns
RL = 110 Ω (see Figure 12)
Rev. A | Page 5 of 20
5 Page 
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ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
TYPICAL PERFORMANCE CHARACTERISTICS
25
20
15
10
5
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT LOW VOLTAGE (V)
Figure 16. Output Current vs. Receiver Output Low Voltage
–18
–16
–14
–12
–10
–8
–6
–4
–2
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT HIGH VOLTAGE (V)
Figure 17. Output Current vs. Receiver Output High Voltage
3.30
IRO = –1.5mA
3.25
3.20
3.15
3.10
3.05
3.00
–50 –25 0 25 50
TEMPERATURE (°C)
75
Figure 18. Receiver Output High Voltage vs. Temperature
0.8
IRO = 2.5mA
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40 10
60 85
TEMPERATURE (°C)
Figure 19. Receiver Output Low Voltage vs. Temperature
100
90
80
70
60
50
40
30
20
10
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
Figure 20. Driver Output Current vs. Differential Output Voltage
2.6
RL = 54Ω
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
–50
–25 0
25 50
TEMPERATURE (°C)
75
Figure 21. Driver Differential Output Voltage vs. Temperature
Rev. A | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADM3490E.PDF ] | |
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