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WED8L24513V Schematic ( PDF Datasheet ) - White Electronic Designs

Teilenummer WED8L24513V
Beschreibung Asynchronous SRAM
Hersteller White Electronic Designs
Logo White Electronic Designs Logo 




Gesamt 6 Seiten
WED8L24513V Datasheet, Funktion
www.DataSheet4U.com
White Electronic Designs
WED8L24513V
Asynchronous SRAM, 3.3V, 512Kx24
FEATURES
512Kx24 bit CMOS Static
Random Access Memory Array
Fast Access Times: 10, 12, and 15ns
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Surface Mount Package
119 Lead BGA (JEDEC MO-163), No. 391
Small Footprint, 14mmx22mm
Multiple Ground Pins for Maximum Noise
Immunity
Single +3.3V (±5%) Supply Operation
DSP Memory Solution
Motorola DSP5630x
Analog Devices SHARCTM
DESCRIPTION
The WED8L24513VxxBC is a 3.3V, twelve megabit SRAM
constructed with three 512Kx8 die mounted on a multi-layer
laminate substrate. With 10 to 15ns access times, x24 width
and a 3.3V operating voltage, the WED8L24513V is ideal
for creating a single chip memory solution for the Motorola
DSP5630x (Figure 7) or a two chip solution for the Analog
Devices SHARCTM DSP (Figure 8).
The single or dual chip memory solutions offer improved
system performance by reducing the length of board traces
and the number of board connections compared to using
multiple monolithic devices.
The JEDEC Standard 119 lead BGA provides a 61% space
savings over using three 512Kx8, 400 mil wide SOJs and the
BGA package has a maximum height of 110 mils compared
to 148 mils for the SOJ packages.
PIN CONFIGURATION
1 2 3 4 5 67
A NC AO A1 A2 A3 A4 NC
B NC A5 A6 E# A7 A8 NC
C I/012 NC NC NC NC NC I/00
D I/013 VCC GND GND GND VCC I/01
E I/014 GND VCC GND VCC GND I/02
F I/015 VCC GND GND GND VCC I/03
G I/016 GND VCC GND VCC GND I/04
H I/017 VCC GND GND GND VCC I/05
J NC GND VCC GND VCC GND NC
K I/018 VCC GND GND GND VCC I/06
L I/019 GND VCC GND VCC GND I/07
M I/020 VCC GND GND GND VCC I/08
N I/021 GND VCC GND VCC GND I/09
P I/022 VCC GND GND GND VCC I/010
R I/023 A18 NC NC NC A17 I/011
T NC A9 A10 W# A11 A12 NC
U NC A13 A14 G# A15 A16 NC
PIN NAMES
A0-18
E#
W#
G#
DQ0-23
VCC
GND
NC
Address Inputs
Chip Enable
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (3.3V ±5%)
Ground
No Connection
A0-A18
G#
W#
E#
BLOCK DIAGRAM
19
512K x 24
Memory
Array
DQ0-7
DQ8-15
DQ16-23
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Aug, 2002
Rev. 0A
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com






WED8L24513V Datasheet, Funktion
White Electronic Designs
WED8L24513V
FIG. 7 INTERFACING THE MOTOROLA DSP5630x DSP FAMILY WITH THE
WED8L24513V (512K x 24)
Address Bus
A23-0
AA0
WED8L24513V
(512K x 24)
A18-0
E#
DQ0-23
W#
G#
AA1
Motorola
DSP5630x
AA2
AA3
WR#
RD#
WED8L24513V
(512K x 24)
A18-0
E#
DQ0-23
W#
G#
Databus
D23-0
Notes:
1. In this example three 512K x 24 external memory
arrays are shown, one for X data, one for Y data and
one for Program. Specific applications may require
one, two, or all three arrays.
2. Any combination of AA0-AA3 may be used as chip
selects. However, each chip select may only be used
to select one memory array.
WED8L24513V
(512K x 24)
A18-0
E#
DQ0-23
W#
G#
FIG. 8 INTERFACING THE ANALOG DEVICES 2106XL DSP FAMILY WITH THE
WED8L24513V (512K X 24)
Address Bus
A31-0
MSX
Analog
WR#
ADSP-2106xL RD#
Databus
D47-0
WED8L24513V
(512K x 24)
A18-0
DQ16-23
E# DQ8-15
W# DQ0-7
G#
WED8L24513V
(512K x 24)
A18-0
E#
DQ16-23
DQ8-15
W# DQ0-7
G#
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Aug, 2002
Rev. 0A
6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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