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PDF ADUC7030 Data sheet ( Hoja de datos )
| Número de pieza | ADUC7030 | |
| Descripción | (ADUC7030 / ADUC7033) Integrated Precision Battery Sensor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Preliminary Technical Data
Integrated Precision Battery Sensor
For Automotive
ADuC7030/ADuC7033
FEATURES
High precision ADCs
Dual channel, simultaneous sampling, 16-bit Σ∆ ADCs
Programmable ADC throughput from 1 Hz to 8 kHz
On-chip 5ppm/°C voltage reference
Current channel
Fully differential, buffered Input
Programmable gain from 1 to 512
ADC input range: −200 mV to +300 mV
Digital comparators, with current accumulator feature
Voltage channel
Buffered, on-chip attenuator for 12V battery inputs
Temperature channel
External and on-chip temperature sensor options
Microcontroller
ARM7TDMI core, 16-/32-bit RISC architecture
20.48 MHz PLL with programmable divider
PLL Input Source
On-chip precision oscillator
On-chip low-power oscillator
External (32.768 kHz) watch crystal
JTAG port supports code download and debug
Memory
32 kbytes Flash/EE memory, 4 kbytes SRAM (ADuC7030)
96 kbytes Flash/EE memory, 6 kbytes SRAM (ADuC7033)
10 kcycles Flash/EE endurance, 20 years Flash/EE retention
In-circuit download via JTAG and LIN
On-chip peripherals
LIN 2.0 (slave) compatible support via UART with
hardware synchronization
Flexible wake-up I/O pin, master/slave SPI serial I/O
9-pin GPIO port, 3 X general purpose timers
Wake-up and watchdog timers
Power supply monitor, on-chip power-on-reset
Power
Operates directly from 12 V battery supply
Current consumption
Normal mode 10 mA at 10 MHz
Low power monitor mode
Packages and temperature range
48 Pin LFCSP 7X7 mm or 48 Pin LQFP 7X7 mm body
package
Fully specified for −40°C to +115°C operation
APPLICATIONS
Battery sensing/management for automotive systems
FUNCTIONAL BLOCK DIAGRAM
TCK TDI TDO NTRST TMS
IIN+
IIN–
VBAT
PRECISION ANALOG ACQUISITION
PGA
16-BIT
Σ-∆ ADC
ADuC7030/ADuC7033
2.6V LDO
PSM
POR
MEMORY
32KB FLASH
4KB RAM
RESET
VTEMP
GND_SW
VREF
RESULT
DIGITAL
ACCUMULATOR COMPARATOR
MUX BUF
16-BIT
Σ-∆ ADC
TEMPERATURE PRECISION
SENSOR
REFERENCE
ARM7TDMI
MCU
20MHz
PRECISION
OSC
LOW POWER
OSC
ON-CHIP PLL
XTAL1
XTAL2
3 × TIMERS
WDT
W/U TIMER
GPIO PORT
UART PORT
SPI PORT
LIN
WU
STI
LIN/BSD
Figure 1.
Rev. PrE
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice.
No license is granted by implication or otherwise under any patent or patent rights of Analog
Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
SPI Transmit Register:......................................................... 126
SPI Divider Register: ........................................................... 127
Serial Test Interface ...................................................................... 128
STI Key0 Register:................................................................ 128
STI Key1 Register:................................................................ 128
STI DATA0 Register: ........................................................... 128
STI DATA1 Register: ........................................................... 129
STI DATA2 Register: ........................................................... 129
STI Control Register:........................................................... 129
Serial Test Interface Output Structure .............................. 130
Using the Serial Test Interface............................................ 130
LIN (Local Interconnect NETWORK) INTERFACE.............. 132
LIN MMR Description............................................................ 132
LIN Hardware Synchronization Status Register: ............. 133
LIN Hardware Synchronization Control Register 0:....... 134
LIN Hardware Synchronization Control Register 1:....... 136
LIN Hardware Synchronization Timer0 Register:........... 136
LIN Hardware Break Timer1 Register: ............................. 137
LIN Hardware Interface .......................................................... 137
LIN Frame Protocol............................................................. 137
LIN Frame Break Symbol ................................................... 137
LIN Frame Synchronization Byte ...................................... 137
LIN Frame Protected Identifier.......................................... 137
LIN Frame Data Byte........................................................... 137
LIN Frame Data Transmission and Reception ................ 138
Example LIN Hardware Synchronization Routine.......... 139
LIN Diagnostics ................................................................... 140
ADuC7030/ADuC7033
LIN Operation during Thermal Shutdown.......................140
Bit Serial Device (BSD) Interface................................................141
BSD Communication Hardware Interface ............................141
BSD Related MMRs ..................................................................142
LIN Hardware Synchronization Capture Register: ..........142
LIN Hardware Synchronization Compare Register: ........142
BSD Communications Frame .................................................143
BSD Example Pulse Widths.................................................143
Typical BSD Program Flow .................................................143
BSD Data Reception .................................................................144
BSD Data Transmission ...........................................................144
Wake-Up from BSD Interface .................................................144
ADuC7030/ADuC7033 On-Chip Diagnostics .........................145
ADC Diagnostics ......................................................................145
Internal Test Voltage.............................................................145
Internal Short Mode .............................................................145
Internal Current Sources .....................................................145
High Voltage I/O Diagnostics .............................................145
High Voltage Current Detection.........................................145
Part Identification .........................................................................146
System Serial ID Register 0:.................................................146
System Serial ID Register 1:.................................................147
System Kernel Checksum: ...................................................147
System Identification FEE0ADR: .......................................148
ADuC7030/ADuC7033 Example Schematic.............................149
Outline Dimensions......................................................................150
Ordering Guide .........................................................................150
Rev. PrE | Page 5 of 150
5 Page 
Preliminary Technical Data
ADuC7030/ADuC7033
Parameter
IDD–MCU Powered Down1
IDD – MCU Powered Down1
IDD – MCU Powered Down
IDD – MCU Powered Down1
IDD –Current ADC
IDD –Voltage/Temperature
ADC
IDD – Precision Oscillator
Test Conditions/Comments
ADC Low Power Mode, measured over an ambient
temperature range of −40°C to +85°C
(Continuous ADC Conversion )
ADC Low Power-Plus Mode, measured over an ambient
temperature range of −10°C to +40°C
(Continuous ADC Conversion )
Average Current, Measured with Wake and Watchdog
Timer clocked from Low Power Oscillator (−40°C to
+85°C)
Average Current, Measured with Wake and Watchdog
Timer clocked from Low Power Oscillator over an
ambient temperature range of −10°C to +40°C
Min
Typ Max Unit
300 500 µA
520 700 µA
120 300 µA
120 175 µA
1.7 mA
0.5 mA
400 µA
1 These numbers are not production tested, but are guaranteed by design and/or characterization data at production release.
2 Valid for current ADC gain setting of PGA = 4 to 64.
3 These numbers include temperature drift.
4 Tested at gain range = 4; self-offset calibration removes this error.
5 Measured with an internal short after an initial offset calibration.
6 Measured with an internal short
7 These numbers include internal reference temperature drift.
8 Factory Calibrated at Gain = 1.
9 System calibration at specific gain range will remove the error at this gain range
10 Includes an initial system calibration
11 When used in conjunction with ADCREF, the Low Power Mode Reference error MMR.
12 Using ADC Normal Mode Voltage Reference
13 Typical Noise in Low Power modes is measured with Chop enabled.
14 Voltage Channel Specifications include resistive attenuator input stage
15 System Calibration will remove this error
16 rms noise is referred to Voltage attenuator input, for example at FADC=1KHz, typical rms noise at the ADC input is 7.5uV, scaled by the attenuator (24) yields these
input referred noise figures
17 ADC Self Offset calibration will remove this error.
18 Valid after an initial Self Calibration
19 System Calibration will remove this error
20 In ADC Low Power Mode the input range is fixed at ±9.375mV. In ADC Low Power Plus Mode the input range is fixed at ±2.34375mV.
21 It is possible to extend the ADC input range by up to 10% by modifying the factory set value of the Gain Calibration register or using system calibration. This approach
can also be used to reduce the ADC Input Range (LSB Size).
22 Limited by minimum absolute input voltage range.
23 Valid for a differential input less than 10mV
24 Measured using Box Method
25 The long-term stability specification is non cumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
26 References of up to REG_AVDD can be accommodated by enabling an internal Divide-by-2
27 Die Temperature.
28 Endurance is qualified to 10,000 cycles as per JEDEC Std. 22 method A117 and measured at -40°C, +25°C and +125°C. Typical endurance at 25°C is 170,000 cycles.
29 Retention lifetime equivalent at junction temperature (Tj) = 85°C as per JEDEC Std. 22 method A117. Retention lifetime will de-rate with junction temperature.
30 Low Power oscillator can be calibrated against either the precision oscillator or the external 32.768kHz crystal in user code
31 These numbers are not production tested, but are supported by LIN Compliance testing.
32 BSD Electrical Specifications, except High and Low voltage levels, are per LIN2.0 with pull-up resistor disabled and CLoad= 10nF max.
33 Specified after Rlimit of 39Ohms
34 The MCU core is not shutdown but interrupted and high voltage I/O pins are disabled in response to a thermal shutdown event.
35 Thermal Impedance can be used to calculate the thermal gradient from ambient to die temperature.
36 Internal Regulated Supply available at REG_DVDD (ISOURCE =5mA), and REG_AVDD (ISOURCE =1mA)
37 Typical, additional supply current consumed during Flash memory program and erase cycles is 7mA and 5mA respectively.
Rev. PrE | Page 11 of 150
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADUC7030.PDF ] | |
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