Datenblatt-pdf.com


DM9000A Schematic ( PDF Datasheet ) - Davicom

Teilenummer DM9000A
Beschreibung Ethernet Controller
Hersteller Davicom
Logo Davicom Logo 




Gesamt 30 Seiten
DM9000A Datasheet, Funktion
www.DataSheet4U.com
DM9000A
Ethernet Controller with General Processor Interface
DAVICOM Semiconductor, Inc.
DM9000A
Ethernet Controller
with General Processor Interface
DATA SHEET
Preliminary
Version: DM9000A-DS-P03
Apr. 21, 2005
Preliminary
Version: DM9000A-DS-P03
Apr. 21, 2005
1






DM9000A Datasheet, Funktion
DM9000A
Ethernet Controller with General Processor Interface
1. General Description
The DM9000A is a fully integrated and cost-effective
low pin count single chip Fast Ethernet controller with
a general processor interface, a 10/100M PHY and
4K Dword SRAM. It is designed with low power and
high performance process that support 3.3V with 5V
IO tolerance.
The DM9000A supports 8-bit and 16-bit data
interfaces to internal memory accesses for various
processors. The PHY of the DM9000A can interface to the
UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with
AUTO-MDIX. It is fully compliant with the IEEE 802.3u
Spec. Its auto-negotiation function will automatically
configure the DM9000A to take the maximum advantage of
its abilities. The DM9000A also supports IEEE 802.3x full-
duplex flow control..
2. Block Diagram
LED
EEPROM
Interface
TX+/-
RX+/-
PHYceiver
100 Base-TX
transceiver
100 Base-TX
PCS
AUTO-MDIX
10 Base-T
Tx/Rx
MAC
MII
TX Machine
Control
&Status
Registers
RX Machine
Autonegotiation
MII Management
Control
& MII Register
Memory
Management
Internal
SRAM
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
6

6 Page









DM9000A pdf, datenblatt
2 RXVDD25
9 TXVDD25
3 RX+
4 RX-
5,47 RXGND
6 TXGND
7 TX+
8 TX-
5.6 Miscellaneous
Pin No.
Pin Name
41 TEST
40 PWRST#
DM9000A
Ethernet Controller with General Processor Interface
P 2.5V power output for TP RX
P 2.5V power output for TP TX
I/O TP RX Input
I/O TP RX Input
P RX Ground
P TX Ground
I/O TP TX Output
I/O TP TX Output
Type
I
I
Description
Operation Mode
Force to ground in normal application
Power on Reset
Active low signal to initiate the DM9000A
The DM9000A is ready after 5us when this pin deasserted
5.7 Power Pins
Pin No.
Pin Name
23,30,42
VDD
15,33,45
GND
Type
P
P
Digital VDD
3.3V power input
Digital GND
5.8 strap pins table
1: pull-high 1K~10K, 0: floating (default)
Pin No.
Pin Name
Polarity of INT
20
EECK
1: INT pin low active;
0: INT pin high active
21
EECS
DATA Bus Width
1: 8-bit
0: 16-bit
INT output type in 8-bit mode
25
GP6
1: Open-Drain
0: force mode
Description
Description
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
12

12 Page





SeitenGesamt 30 Seiten
PDF Download[ DM9000A Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
DM9000ISA to Ethernet MAC ControllerDavicom
Davicom
DM9000AEthernet ControllerDavicom
Davicom
DM9000BEthernet ControllerDAVICOM
DAVICOM
DM9000BIIndustrial-temperature Ethernet ControllerDAVICOM
DAVICOM

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche