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WSF512K16-XXX Schematic ( PDF Datasheet ) - White Electronic

Teilenummer WSF512K16-XXX
Beschreibung 512KX16 SRAM/FLASH MODULE
Hersteller White Electronic
Logo White Electronic Logo 




Gesamt 15 Seiten
WSF512K16-XXX Datasheet, Funktion
www.DataSheet4U.com
White Electronic Designs
WSF512K16-XXX
512KX16 SRAM/FLASH MODULE, SMD 5962-96901
FEATURES
Access Times of 35ns (SRAM) and 90ns (FLASH)
TTL Compatible Inputs and Outputs
Access Times of 70ns (SRAM) and 120ns (FLASH)
Packaging
• 66 pin, PGA Type, 1.385" square HIP, Hermetic
Ceramic HIP (Package 402)
• 68 lead, Hermetic CQFP (G2), 22mm (0.880")
square (Package 500). Designed to fit JEDEC 68
lead 0.990” CQFJ footprint (FIGURE 2)
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight - 13 grams typical
FLASH MEMORY FEATURES
100,000 Erase/Program Cycles
Sector Architecture
512Kx16 SRAM
• 8 equal size sectors of 64K bytes each
512Kx16 5V FLASH
Organized as 512Kx16 of SRAM and 512Kx16 of
Flash Memory with separate Data Busses
• Any combination of sectors can be concurrently
erased. Also supports full chip erase
5 Volt Programming; 5V ± 10% Supply
Both blocks of memory are User Configurable as
1Mx8
Low Power CMOS
Commercial, Industrial and Military Temperature
Ranges
Embedded Erase and Program Algorithms
Hardware Write Protection
Page Program Operation and Internal Program
Control Time.
Note: Programming information available upon request.
FIGURE 1 – PIN CONFIGURATION
FOR WSF512K16-XH2X
Top View
1 12 23
34 45
56
SD8 SWE2# SD15
FD8 VCC FD15
SD9 SCS2# SD14
FD9 FCS2# FD14
SD10 GND
SD13
FD10 FWE2# FD13
A13 SD11 SD12
A6 FD11 FD12
A14 A10
OE#
A7 A3 A0
A15 A11
A17
NC A4 A1
A16 A12
SWE1#
A8 A5 A2
A18 VCC
SD7
A9 FWE1#
FD7
SD0 SCS1# SD6
FD0 FCS1#
FD6
SD1 NC
SD5
FD1 GND
FD5
SD2 SD3
SD4
11 22 33
FD2 FD3 FD4
44 55
66
Pin Description
FD0-15
SD0-15
A0-18
SWE1-2#
SCS1-2#
OE#
VCC
GND
NC
FWE1-2#
FCS1-2#
Flash Data Inputs/Outputs
SRAM Data Inputs/Outputs
Address Inputs
SRAM Write Enable
SRAM Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Flash Write Enable
Flash Chip Select
Block Diagram
OE#
A0-18
SWE1# SCS1# SWE2# SCS2#
FWE1# FCS1#
FWE2# FCS2#
512K x 8
SRAM
512K x 8
SRAM
512K x 8
FLASH
512K x 8
FLASH
8
SD0-7
8
SD8-15
8
FD0-7
8
FD8-15
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2006
Rev. 6
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com






WSF512K16-XXX Datasheet, Funktion
White Electronic Designs
WSF512K16-XXX
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FWE# CONTROLLED
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
Parameter
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time Before Write
VCC Set-up Time
Chip Programming Time
Chip Select Hold Time
Chip Erase Time (3)
Symbol
tAVAV
tELWL
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tWC
tCS
tWP
tAS
tDS
tDH
tAH
tWPH
tVCS
tOEH
-90
Min Max
90
0
45
0
45
0
45
20
300
15
0
50
11
10
64
-120
Min Max
120
0
50
0
50
0
50
20
300
15
0
50
11
10
64
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
µs
µs
sec
ns
sec
NOTES:
1. Typical value for tWHWH1 is 7ns.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
FLASH AC CHARACTERISTICS – READ ONLY OPERATIONS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
OE# to Output Valid
Chip Select to Output High Z (1)
OE# High to Output High Z (1)
Output Hold from Address, CS# or OE# Change, whichever is first
Symbol
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
tDF
tOH
-90
Min Max
90
90
90
35
20
20
0
-120
Min Max
120
120
120
50
30
30
0
1. Guaranteed by design, not tested.
Unit
ns
ns
ns
ns
ns
ns
ns
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2006
Rev. 6
6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

6 Page









WSF512K16-XXX pdf, datenblatt
White Electronic Designs
WSF512K16-XXX
FIGURE 11 – WRITE/ERASE/PROGRAM OPERATION FOR FLASH MEMORY, CS# CONTROLLED
Addresses
FWE#
OE#
FCS#
Data
5555H
tWC
PA
tAS tAH
tGHEL
tCP
tWS tCPH
tDH
A0H
PD
tDS
5.0 V
NOTES:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
Data# Polling
PA
tWHWH1
D7#
DOUT
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2006
Rev. 6
12 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 Page





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