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PDF ADD8754 Data sheet ( Hoja de datos )
| Número de pieza | ADD8754 | |
| Descripción | Gate Modulation | |
| Fabricantes | Analog Devices | |
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FEATURES
Step-up switching regulator with 2 A power switch
650 kHz or 1.2 MHz switching frequency
Output adjustable to 20 V
350 mA logic voltage regulator
Selectable output voltages: 2.5 V, 2.85 V, 3.3 V
VCOM amplifier with 300 mA drive
Gate pulse modulation circuitry
Independently adjustable delay and falling slope
General
3 V to 5.5 V input
Undervoltage lockout
Thermal shutdown
24-lead, Pb-free LFCSP package
APPLICATIONS
TFT LCD panels for monitors, TVs, and notebooks
GENERAL DESCRIPTION
The ADD8754 is optimized for use in TFT LCD applications,
requiring only external charge pump components to provide all
the requirements for panel power, VCOM, and gate modulation.
Included in a single chip are a high frequency step-up dc-to-dc
switching regulator, logic voltage regulator, VCOM amplifier, and
gate pulse modulation circuitry.
The step-up dc-to-dc converter provides up to 20 V output and
includes a 2 A internal switch. Either a 650 kHz or 1.2 MHz step-
up switching regulator frequency can be chosen, allowing easy
filtering and low noise operation. It achieves 93% efficiency and
features soft start to limit the inrush current at startup.
The internal voltage regulator operates with an input voltage
range of 3 V to 5.5 V and delivers a load current of up to
LCD Panel Power, VCOM,
and Gate Modulation
ADD8754
FUNCTIONAL BLOCK DIAGRAM
COMP SS VIN_1 VIN_2
FB
FREQ
SHDN
ADD8754
STEP-UP SWITCHING
REGULATOR
LX
UNDER VOLTAGE LOCKOUT
AND THERMAL PROTECTION
VDD_2
OUT
LOGIC VOLTAGE
REGULATOR
VCOM AMPLIFIER
LDO_OUT
ADJ
POS
NEG
GATE PULSE
MODULATION
VGH VGH_M VDD_1 CE RE VFLK VDPM
Figure 1.
350 mA. Three selectable output voltages are available: 2.5 V,
2.85 V, and 3.3 V.
The proprietary VCOM amplifier can deliver a peak output
current of 300 mA and is specifically designed to drive TFT
panel loads.
The gate pulse modulator allows shaping of the TFT gate high
voltage to improve image quality. The integrated switches
provide the ability to independently control the delay and slope
for the gate drive voltage.
The ADD8754 is offered in a 24-lead, Pb-free LFCSP package and
is specified over the industrial temperature range of −40 to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2005 Analog Devices, Inc. All rights reserved.
1 page  
ADD8754
VCOM AMPLIFIER SPECIFICATIONS
VIN_1 = VIN_2 = SHDN = 5 V, VDD_2 = 14 V, POS = 4.0 V, NEG = OUT, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Symbol Conditions
Min Typ
Offset Voltage
Noninverting Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current1
POWER SUPPLY
VOS
IB
CMRR
VOH
VOL
IOUT
VCM = 2 V to (VDD_2 − 3) V
2
IOUT (source) = 50 mA
IOUT (sink) = 50 mA
19
50
60
VDD_2 − 0.5
50
±300
Supply Voltage
Power Supply Rejection Ratio
Supply Current
DYNAMIC PERFORMANCE
Slew Rate2
Gain Bandwidth
VDD_2
PSRR
ISY
7.5 V ≤ VDD_2 ≤ 18.5 V
No load, POS = VDD_2 /2
8
65
SR
GBW
RL = 10 kΩ, CL = 10 pF
−3 dB, RL = 10 kΩ, CL = 10 pF
70
2
105
1.95
1 Not short-circuit protected.
2 Slew rate is the average of the rising and the falling slew rates.
Max Unit
300
VDD_2 − 3
mV
nA
V
dB
V
mV
mA
18 V
dB
mA
V/μs
MHz
Rev. 0 | Page 5 of 28
5 Page 
T Δ: 8.00V
@: 5.04V
Δ: 102ns
@: –83.2ns
1
Ch1 2.00 V
M 40.0ns A Ch1 12.0 V
Figure 15. VCOM Rising Slew Rate, VDD_2 = 14 V
T
Δ: 8.08V
@: 9.08V
Δ: 60.8ns
@: 1.88μs
1
Ch1 2.00 V
M 40.0ns A Ch1 5.16 V
Figure 16. VCOM Falling Slew Rate, VDD_2 = 14 V
ADD8754
5.0
4.5
4.0
3.5
3.0 0kΩ
2.5 5kΩ
2.0
10kΩ
1.5
50kΩ 25kΩ
1.0
0.5
0
0 100 200 300 400 500 600
CAPACITANCE CE (pF)
Figure 17. GPM Delay Time vs. CE Capacitance
700
Rev. 0 | Page 11 of 28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ADD8754.PDF ] | |
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