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PCA9539 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9539
Beschreibung 16-bit I2C and SMBus low power I/O port
Hersteller NXP Semiconductors
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Gesamt 21 Seiten
PCA9539 Datasheet, Funktion
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INTEGRATED CIRCUITS
PCA9539
16-bit I2C and SMBus, low power I/O port
with interrupt and reset
Product data sheet
Supersedes data of 2004 Aug 27
2004 Sep 30
Philips
Semiconductors






PCA9539 Datasheet, Funktion
Philips Semiconductors
16-bit I2C and SMBus, low power I/O port
with interrupt and reset
Product data sheet
PCA9539
REGISTERS
Command Byte
Command
0
1
2
3
4
5
6
7
Register
Input port 0
Input port 1
Output port 0
Output port 1
Polarity inversion port 0
Polarity inversion port 1
Configuration port 0
Configuration port 1
The command byte is the first byte to follow the address byte during
a write transmission. It is used as a pointer to determine which of the
following registers will be written or read.
Registers 0 and 1 — Input Port Registers
bit I0.7 I0.6 I0.5 I0.4 I0.3 I0.2 I0.1
default X X X X X X X
bit I1.7 I1.6 I1.5 I1.4 I1.3 I1.2 I1.1
default X X X X X X X
IO.0
X
I1.0
X
This register is an input-only port. It reflects the incoming logic levels
of the pins, regardless of whether the pin is defined as an input or an
output by Register 3. Writes to this register have no effect.
The default value ‘X’ is determined by the externally applied logic
level.
Registers 2 and 3 — Output Port Registers
bit O0.7 O0.6 O0.5 O0.4 O0.3 O0.2 O0.1
default 1 1 1 1 1 1 1
bit O1.7 O1.6 O1.5 O1.4 O1.3 O1.2 O1.1
default 1 1 1 1 1 1 1
O0.0
1
O1.0
1
This register is an output-only port. It reflects the outgoing logic
levels of the pins defined as outputs by Register 6 and 7. Bit values
in this register have no effect on pins defined as inputs. In turn,
reads from this register reflect the value that is in the flip-flop
controlling the output selection, NOT the actual pin value.
Registers 4 and 5 — Polarity Inversion Registers
bit N0.7 N0.6 N0.5 N0.4 N0.3 N0.2 N0.1 N0.0
default 0 0 0 0 0 0 0 0
bit N1.7 N1.6 N1.5 N1.4 N1.3 N1.2 N1.1 N1.0
default 0 0 0 0 0 0 0 0
This register allows the user to invert the polarity of the Input Port
register data. If a bit in this register is set (written with ‘1’), the Input
Port data polarity is inverted. If a bit in this register is cleared (written
with a ‘0’), the Input Port data polarity is retained.
Registers 6 and 7 — Configuration Registers
bit C0.7 C0.6 C0.5 C0.4 C0.3 C0.2 C0.1 C0.0
default 1 1 1 1 1 1 1 1
bit C1.7 C1.6 C1.5 C1.4 C1.3 C1.2 C1.1 C1.0
default 1 1 1 1 1 1 1 1
This register configures the directions of the I/O pins. If a bit in this
register is set (written with ‘1’), the corresponding port pin is enabled
as an input with high impedance output driver. If a bit in this register
is cleared (written with ‘0’), the corresponding port pin is enabled as
an output. At reset the device’s ports are inputs.
POWER-ON RESET
When power is applied to VDD, an internal power-on reset holds the
PCA9539 in a reset condition until VDD has reached VPOR. At that
point, the reset condition is released and the PCA9539 registers and
SMBus state machine will initialize to their default states. Therefore,
VDD must be lowered below 0.2 V to reset the device.
For a power reset cycle, VDD must be lowered below 0.2 V and then
restored to the operating voltage.
RESET Input
A reset can be accomplished by holding the RESET pin LOW for a
minimum of tW. The PCA9539 registers and SMBus/I2C state
machine will be held in their default state until the RESET input is
once again HIGH. This input typically requires a pull-up to VDD.
DEVICE ADDRESS
slave address
1 1 1 0 1 A1 A0 R/W
fixed
programmable
SW02204
Figure 5. PCA9539 address
2004 Sep 30
6

6 Page









PCA9539 pdf, datenblatt
Philips Semiconductors
16-bit I2C and SMBus, low power I/O port with interrupt
Product data sheet
PCA9539
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
VDD
VI/O
II/O
II
IDD
ISS
Ptot
Tstg
Tamb
TJ(MAX)
Supply voltage
DC input current on an I/O
DC output current on an I/O
DC input current
Supply current
Supply current
Total power dissipation
Storage temperature range
Operating ambient temperature
Maximum junction temperature
CONDITIONS
MIN
–0.5
VSS – 0.5
–65
–40
MAX
6.0
6
± 50
± 20
160
200
200
+150
+85
+125
UNIT
V
V
mA
mA
mA
mA
mW
°C
°C
°C
2004 Sep 30
12

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