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PDF ADG794 Data sheet ( Hoja de datos )

Número de pieza ADG794
Descripción Quad 2:1 Mux Analog HDTV Audio/Video Switch
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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No Preview Available ! ADG794 Hoja de datos, Descripción, Manual

Low Voltage, 300 MHz Quad 2:1 Mux Analog
HDTV Audio/Video Switch
ADG794
FEATURES
Bandwidth: 300 MHz
Low insertion loss and on resistance: 5 Ω typical
On-resistance flatness: 0.7 Ω typical
Single 3.3 V/5 V supply operation
Low quiescent supply current: 1 nA typical
Fast switching times
tON, 7 ns
tOFF, 5 ns
TTL/CMOS compatible
ESD protection
2 kV human body model (HBM)
200 V machine model (MM)
1 kV field-induced charged device model (FICDM)
APPLICATIONS
RGB switches
HDTV
DVD-R
Audio/video switches
GENERAL DESCRIPTION
The ADG794 is a monolithic CMOS device comprising four
2:1 multiplexers/demultiplexers with high impedance outputs.
The CMOS process provides low power dissipation yet gives high
switching speed and low on resistance. The on-resistance variation
is less than 1.2 Ω over the input signal range.
The wide bandwidth of the ADG794 (300 MHz typical), coupled
with low distortion (0.18% typical), makes the part suitable for
switching analog audio/video signals.
The ADG794 operates from a single 3.3 V/5 V supply and is TTL
logic compatible. The switches are controlled by the logic inputs
IN and EN, as shown in Table 4. The EN pin allows the user to
disable all switches.
These switches conduct equally well in both directions when on.
In the off condition, signal levels up to the supplies are blocked.
The ADG794 switches exhibit break-before-make switching action.
The ADG794 is available in a 16-lead QSOP.
FUNCTIONAL BLOCK DIAGRAM
ADG794
S1A
S1B
S2A
S2B
S3A
S3B
S4A
S4B
D1
D2
D3
D4
1 OF 2
DECODER
EN IN
Figure 1.
PRODUCT HIGHLIGHTS
1. Wide bandwidth: 300 MHz.
2. Ultralow power dissipation.
3. Crosstalk: −70 dB (typical) at 10 MHz.
4. Off isolation: −65 dB (typical) at 10 MHz.
5. ESD protection tested as per ESD Association Standards:
2 kV HBM (ANSI/ESD STM5.1-2001)
200 V MM (ANSI/ESD STM5.2-1999)
1 kV FICDM (ANSI/ESD STM5.3.1-1999)
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2008 Analog Devices, Inc. All rights reserved.

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ADG794 pdf
ADG794
VDD = 3 V ± 10%, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match between Channels, ∆RON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON, tON (EN)
tOFF, tOFF (EN)
Break-Before-Make Time Delay, tD
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth −3 dB
THD + N
Charge Injection
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
B Version1
25°C
TMIN to TMAX
Unit
0 to 1.5
V
7 Ω typ
9.5 11
Ω max
0.3 Ω typ
0.9 Ω max
2.6 Ω typ
5 Ω max
±0.001
±0.001
±0.001
nA typ
nA typ
nA typ
2.0 V min
0.8 V max
0.001
±0.1
3
μA typ
μA max
pF typ
10
16
6
10
3
1
−65
−70
300
0.18
4
8
14
23
ns typ
ns max
ns typ
ns max
ns typ
ns min
dB typ
dB typ
MHz typ
% typ
pC typ
pF typ
pF typ
pF typ
0.001
1
μA typ
μA max
1 Temperature range for B version is −40°C to +85°C.
2 Guaranteed by design, not subject to production test.
Test Conditions/Comments
VD = 0 V to 1 V; IS = −10 mA; Figure 8
VD = 0 V to 1 V; IS = −10 mA
VD = 0 V to 1 V; IS = −10 mA
VS = 2 V/1 V; VD = 1 V/2 V; Figure 9
VS = 2 V/1 V; VD = 1 V/2 V; Figure 9
VD = VS = 2 V/1 V; Figure 10
VIN = VINL or VINH
CL = 35 pF; RL = 50 Ω
VS = 1.5 V; Figure 11
CL = 35 pF; RL = 50 Ω
VS = 1.5 V; Figure 11
CL = 35 pF; RL = 50 Ω
VS1 = VS2 = 1.5 V; Figure 12
f = 10 MHz; RL = 50 Ω; Figure 14
f = 10 MHz; RL = 50 Ω; Figure 15
RL = 50 Ω; Figure 13
RL = 100 Ω
CL = 1 nF; VS = 0 V; Figure 16
VDD = 3.3 V; digital inputs = 0 V or VDD
Rev. B | Page 4 of 12

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ADG794 arduino
ADG794
TEST CIRCUITS
IDS
V1
SD
VS RON = V1/IDS
IS (OFF)
AS
VS
ID (OFF)
DA
VD
Figure 8. On Resistance
5V
0.1µF
VDD
SD
VS
IN
EN GND
Figure 9. Off Leakage
VIN 3V
50%
VOUT
90%
RL CL
5035pF
VOUT
tON
NC S
ID (ON)
DA
NC = NO CONNECT
VD
Figure 10. On Leakage
50%
90%
tOFF
5V
0.1µF
Figure 11. Switching Times
VDD
3V
S1A
S1B
VS
VS
D1
RL
50
VOUT
VIN
0V
CL
35pF
VOUT
VS
DECODER
EN
IN GND
50%
80%
tD
50%
80%
tD
Figure 12. Break-Before-Make Time Delay
VDD
0.1µF
ADG794
S1A
IN
VIN D1
EN GND
NETWORK
ANALYZER
50
VS
VOUT
50
Figure 13. Bandwidth
Rev. B | Page 10 of 12

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