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AD8563 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8563
Beschreibung Auto Zero In-Amp
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 15 Seiten
AD8563 Datasheet, Funktion
www.DataSheet4U.com
Preliminary Technical Data
FEATURES
Low offset voltage: 25 μV max
Low input offset drift: 0.1 μV/°C max
High CMR: 120 dB min @ G = 100
Low noise: 0.7 μV p-p from 0.01 Hz to 10 Hz
Wide gain range: 1 to 10,000
Single-supply operation: +2.7 V to +5.5 V
Rail-to-rail output
Shutdown capability
−40°C to +125°C operation
APPLICATIONS
Strain gauge
Weigh scales
Pressure sensors
Laser diode control loops
Portable medical instruments
Thermocouple amplifiers
1.8 V to 5 V Auto-Zero,
In-Amp with Shutdown
AD8563
PIN CONFIGURATION
RGA 1
VINP 2
VCC 3
VO 4
VFB 5
AD8563
TOP VIEW
(Not to Scale)
10 RGB
9 VINN
8 GND
7 VREF
6 ENABLE
Figure 1. 10-Lead MSOP
GENERAL DESCRIPTION
The AD85631 is a precision instrumentation amplifier featuring
low noise, rail-to-rail output and a power-saving shutdown
mode. The AD8563 also features low offset voltage and drift
coupled with high common-mode rejection. In shutdown
mode, the total supply current is reduced to less than 4 μA.
The AD8563 is capable of operating from 2.7 V to 5.5 V.
With a low offset voltage of 30 μV, an offset voltage drift of
0.5 μV/°C, and a voltage noise of only 1 μV p-p (0.01 Hz to
10 Hz), the AD8563 is ideal for applications where error sources
cannot be tolerated. Precision instrumentation, position and
pressure sensors, medical instrumentation, and strain gauge
amplifiers benefit from the low noise, low input bias current,
and high common-mode rejection. The small footprint and low
cost are ideal for high volume applications.
The small package and low power consumption allow
maximum channel density and minimum board size for
space-critical equipment and portable systems.
The AD8563 is specified over the industrial temperature range
from −40°C to +125°C. The AD8563 is available in a Pb-free,
10-lead MSOP.
1 Patent pending.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
DataSheet4 U .com
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2006 Analog Devices, Inc. All rights reserved.






AD8563 Datasheet, Funktion
www.DataSheet4U.com
AD8563
THEORY OF OPERATION
The AD8563 is a precision current-mode correction
instrumentation amplifier capable of single-supply operation.
The current-mode correction topology results in excellent
accuracy, without the need for trimmed resistors on the die.
Figure 2 shows a simplified diagram illustrating the basic
operation of the AD8563 (without correction). The circuit
consists of a voltage-to-current amplifier (M1 to M6), followed
by a current-to-voltage amplifier (R2 and A1). Application of a
differential input voltage forces a current through External
Resistor R1, resulting in conversion of the input voltage to a
signal current. Transistor M3 to Transistor M6 transfer twice
this signal current to the inverting input of the op amp A1.
Amplifier A1 and External Resistor R2 form a current-to-
voltage converter to produce a rail-to-rail output voltage at
VOUT.
Op amp A1 is a high precision, auto-zero amplifier. This
amplifier preserves the performance of the autocorrecting,
current-mode amplifier topology while offering the user a true
voltage-in, voltage-out instrumentation amplifier. Offset errors
are corrected internally.
An external reference voltage is applied to the non-inverting
input of A1 to set the output reference level. External Capacitor
C2 filters out correction noise.
The pin out of the AD8563 allows the user to access the signal
current from the output of the voltage-to-current converter
(Pin 5). The user can choose to use the AD8563 as a current-
output device instead of a voltage-output device. See Figure 7
for circuit connections.
Preliminary Technical Data
HIGH PSR AND CMR
Common-mode rejection and power supply rejection indicate
the amount that the offset voltage of an amplifier changes when
its common-mode input voltage or power supply voltage changes.
The auto-correction architecture of the AD8563 continuously
corrects for offset errors, including those induced by changes in
input or supply voltage, resulting in exceptional rejection
performance. The continuous auto-correction provides great
CMR and PSR performances over the entire operating
temperature range (−40°C to +125°C).
The parasitic resistance in series with R2 does not degrade
CMR but causes a small gain error and a very small offset error.
Therefore, an external buffer amplifier is not required to drive
the VREF pin to maintain excellent CMR performance. This
helps reduce system costs over conventional instrumentation
amplifiers.
1/f NOISE CORRECTION
Flicker noise, also known as 1/f noise, is noise inherent in the
physics of semiconductor devices and decreases 10 dB per
decade. The 1/f corner frequency of an amplifier is the frequency
at which the flicker noise is equal to the broadband noise of the
amplifier. At lower frequencies, flicker noise dominates causing
large errors in low frequency or dc applications.
Flicker noise is effectively visible as a slowly varying offset error,
which the auto-correction topology of the AD8563 reduces. This
allows the AD8563 to have lower noise near dc than standard
low noise instrumentation amplifiers.
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AD8563 pdf, datenblatt
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AD8563
Preliminary Technical Data
LOGIC
VS+
2
1
+
3
R1 AADD88556533
10
9_
8
VS–
6
7
5
4
VREF
C2
R2
VS+
2
1
+
3
R6 AADD88556533
10
9_
8
6
7
5
4
VREF
C3
R7
R3
100
R8
100
VS+
2
1
+
3
R11 AADD88556533
10
9_
8
6
7
5
4
VREF
C4
R12
Figure 9. Multiplexed Output
R13
100
VOUT
1µF
Table 5. Recommended External Component Values for Selected Gains
Desired Gain (V/V)
R1 (Ω)
R2 || C2 (Ω || F)
1
200 k
100 k || 1200p
2
100 k
100 k || 1200p
5
40.2 k
100 k || 1200p
10 20 k 100 k || 1200p
50
4.02 k
100 k || 1200p
100
3.92 k
196 k || 560p
500
3.92 k
976 k || 120p
1000
3.92 k
1.96 M || 56p
Calculated Gain
1
2
4.975
10
49.75
100
497.95
1000
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