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ADP3120 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP3120
Beschreibung Dual Bootstrapped 12 V MOSFET Driver
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
ADP3120 Datasheet, Funktion
www.DataSheet4U.com
Dual Bootstrapped 12 V MOSFET
Driver with Output Disable
ADP3120
FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs
to float output per Intel® VRM 10 specification
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
GENERAL DESCRIPTION
The ADP3120 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a non-
isolated synchronous buck power converter. Each of the drivers
is capable of driving a 3000 pF load with a 45 ns propagation
delay and a 25 ns transition time. One of the drivers can be
bootstrapped and is designed to handle the high voltage slew
rate associated with floating high-side gate drivers. The
ADP3120 includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs.
The OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.
The ADP3120 is specified over the commercial temperature
range of 0°C to 85°C and is available in 8-lead SOIC and 8-lead
LFCSP packages.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
12V
ADP3120
IN 2
VCC
4
DELAY
OD 3
CMP
1V
DELAY
CMP
VCC
6
CONTROL
LOGIC
Figure 1.
D1
BST
1
CBST1
DRVH
8
CBST2
RG
Q1
SW
7
RBST
TO
INDUCTOR
DRVL
5
PGND
6
Q2
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.






ADP3120 Datasheet, Funktion
ADP3120
TIMING CHARACTERISTICS
OD
DRVH
OR
DRVL
tpdlOD
tpdhOD
90%
10%
Figure 4. Output Disable Timing Diagram
IN
DRVL
DRVH-SW
SW
tpdlDRVL
tfDRVL
tpdlDRVH
trDRVL
tpdhDRVH trDRVH
VTH
tfDRVH
VTH
tpdhDRVL
1V
Figure 5. Timing Diagram
(Timing is referenced to the 90% and 10% points, unless otherwise noted.)
Rev. 0 | Page 6 of 16

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ADP3120 pdf, datenblatt
ADP3120
Figure 16. VRD 10.x-Compliant Power Supply Circuit
Rev. 0 | Page 12 of 16

12 Page





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