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PDF ADG1334 Data sheet ( Hoja de datos )

Número de pieza ADG1334
Descripción Quad SPDT +-15 V/+12 V Switches
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
33 V supply range
130 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic compatible inputs
Rail-to-rail operation
Break-before-make switching action
20-lead SSOP
APPLICATIONS
Audio and video routing
Battery-powered systems
Signal routing
GENERAL DESCRIPTION
The ADG1334 is a monolithic CMOS device comprising
four independently selectable SPDT switches designed on a
CMOS process.
When the switches are on, each switch conducts equally well
in both directions and has an input signal range that extends to
the power supplies. In the off condition, signal levels up to the
supplies are blocked. All switches exhibit break-before-make
switching action for use in multiplexer applications. Inherent in
the design is the low charge injection for minimum transients
when switching the digital inputs.
Fast switching speed coupled with high signal bandwidth makes
the part suitable for video signal switching. CMOS construction
ensures ultra ow power dissipation, making the part ideally
suited for portable and battery-powered instruments.
Quad SPDT
±15 V/+12 V Switches
ADG1334
FUNCTIONAL BLOCK DIAGRAM
S1A
D1
S1B
IN1
ADG1334
IN2
S2B
D2
S2A
S4A
D2
S4B
IN4
IN3
S3B
D3
S3A
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. 3 V logic compatible digital input VIH = 2.0 V, VIL = 0.8 V.
2. No VL logic power supply required.
3. Low power consumption.
4. 20-lead SSOP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.

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ADG1334 pdf
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ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog, Digital Inputs1
Continuous Current, S or D
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle max)
Operating Temperature Range
Industrial Temperature Range
(B Version)
Storage Temperature Range
Junction Temperature
SSOP Package
θJA, Thermal Impedance
Reflow Soldering Peak Temperature,
Pb-free
Rating
35 V
−0.3 V to +25 V
+0.3 V to −25 V
VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
24 mA
100 mA
−40°C to +105°C
−65°C to +150°C
150°C
83.2°C/W
260°C
1 Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
ADG1334
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any one
time.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12

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VDD
0.1μF
VSS
0.1μF
VS
VIN
VDD
D
INx
VSS
SxB
SxA
GND
NC
VOUT
CL
1nF
VIN (NORMALLY
CLOSED SWITCH)
VIN (NORMALLY
OPEN SWITCH)
VOUT
ΔVOUT
ON
QINJ = CL × ΔVOUT
OFF
Figure 16. Charge Injection
ADG1334
VDD
0.1μF
VSS
0.1μF
VDD
VSS
INx
VIN
SxA SxB
D
GND
NC
50Ω
NETWORK
ANALYZER
50Ω
VS
RL VOUT
50Ω
VOUT
OFF ISOLATION = 20 log VS
Figure 17. Off Isolation
VDD
0.1μF
VSS
0.1μF
VDD
VSS
INx
VIN
SxA SxB
D
GND
NC
NETWORK
ANALYZER
50Ω
VS
RL VOUT
50Ω
VOUT WITH SWITCH
INSERTION LOSS = 20 log VOUT WITHOUT SWITCH
Figure 18. Bandwidth
NETWORK
ANALYZER
VOUT
RL
50Ω
VS
VDD
0.1μF
VSS
0.1μF
VDD
SxA
VSS
SxB
INx
GND
D
R
50Ω
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT
VS
Figure 19. Channel-to-Channel Crosstalk
Rev. 0 | Page 11 of 12

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