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PDF ADV7188 Data sheet ( Hoja de datos )
| Número de pieza | ADV7188 | |
| Descripción | Multiformat SDTV Video Decoder | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADV7188 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Multiformat SDTV Video Decoder
with Fast Switch Overlay Support
ADV7188
FEATURES
Multiformat video decoder supports NTSC (J/M/4.43),
PAL (B/D/G/H/I/M/N), SECAM
Integrates four 54 MHz, Noise Shaped Video (NSV®), 12-bit ADCs
SCART fast blank support
Clocked from a single 28.63636 MHz crystal
Line-locked clock-compatible (LLC)
Adaptive Digital Line Length Tracking (ADLLT™), signal
processing, and enhanced FIFO management give
mini-TBC functionality
5-line adaptive comb filters
Proprietary architecture for locking to weak, noisy, and
unstable video sources such as VCRs and tuners
Subcarrier frequency lock and status information output
Integrated automatic gain control (AGC) with adaptive peak
white mode
Macrovision® copy protection detection
Chroma transient improvement (CTI)
Digital noise reduction (DNR)
Multiple programmable analog input formats
CVBS (composite video)
Y/C (S-video)
YPrPb (component) (VESA, MII, SMPTE, and BETACAM)
12 analog video input channels
Integrated antialiasing filters
Programmable interrupt request output pin
GENERAL DESCRIPTION
The ADV7188 integrated video decoder automatically detects and
converts standard analog baseband television signals compatible
with worldwide NTSC, PAL, and SECAM standards into
4:2:2 component video data compatible with 20-/16-/10-/8-bit
CCIR 601/CCIR 656.
The advanced, highly flexible digital output interface enables
performance video decoding and conversion in line-locked,
clock-based systems. This makes the device ideally suited for a
broad range of applications with diverse analog video character-
istics, including tape-based sources, broadcast sources, security
and surveillance cameras, and professional systems.
The accurate 12-bit ADC provides professional quality video
performance and is unmatched. This allows true 10-bit
resolution in the 10-bit output mode.
The 12 analog input channels accept standard composite, S-video,
and component video signals in an extensive number of
combinations.
Automatic NTSC/PAL/SECAM identification
Digital output formats (8-bit, 10-bit, 16-bit, or 20-bit)
ITU-R BT.656 YCrCb 4:2:2 output + HS, VS, and FIELD
0.5 V to 1.6 V analog signal input range
Differential gain: 0.4% typical
Differential phase: 0.4° typical
Programmable video controls
Peak white/hue/brightness/saturation/contrast
Integrated on-chip video timing generator
Free-run mode (generates stable video output with no input)
VBI decode support for close captioning (including Gemstar®
1×/2× (XDS)), WSS, CGMS, teletext, VITC, VPS
Power-down mode
2-wire serial MPU interface (I2C® compatible)
3.3 V analog, 1.8 V digital core, 3.3 V input/output supply
Industrial temperature grade: −40°C to +85°C
80-lead, Pb-free LQFP
APPLICATIONS
High end DVD recorders
Video projectors
HDD-based PVRs/DVDRs
LCD TVs
Set-top boxes
Professional video products
AVR receiver
AGC and clamp-restore circuitry allow an input video signal
peak-to-peak range of 0.5 V to 1.6 V. Alternatively, these can be
bypassed for manual settings.
The fixed 54 MHz clocking of the ADCs and datapath for all
modes allows very precise, accurate sampling and digital filtering.
The line-locked clock output allows the output data rate, timing
signals, and output clock signals to be synchronous, asynchronous,
or line locked even with ±5% variation in line length. The output
control signals allow glueless interface connections in most
applications. The ADV7188 modes are set up over a 2-wire,
serial, bidirectional port (I2C compatible).
SCART and overlay functionality are enabled by the ability of
the ADV7188 to process CVBS and standard definition RGB
signals simultaneously. Signal mixing is controlled by the fast
blank pin. The ADV7188 is fabricated in a 3.3 V CMOS process.
Its monolithic CMOS construction ensures greater functionality
with lower power dissipation. It is packaged in a small, Pb-free,
80-lead LQFP.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
ADV7188
INTRODUCTION
The ADV7188 is a high quality, single chip, multiformat video
decoder that automatically detects and converts PAL, NTSC,
and SECAM standards in the form of composite, S-video, and
component video into a digital ITU-R BT.656 format.
The advanced, highly flexible digital output interface enables
performance video decoding and conversion in line-locked, clock-
based systems. This makes the device ideally suited for a broad
range of applications with diverse analog video characteristics,
including tape-based sources, broadcast sources, security and
surveillance cameras, and professional systems.
ANALOG FRONT END
The ADV7188 analog front end includes four 12-bit NSV ADCs
that digitize the analog video signal before applying it to the
standard definition processor (SDP). The analog front end uses
differential channels for each ADC to ensure high performance
in mixed-signal applications.
The front end also includes a 12-channel input mux that enables
multiple video signals to be applied to the ADV7188. Current and
voltage clamps are positioned in front of each ADC to ensure
that the video signal remains within the range of the converter.
Fine clamping of the video signals is performed downstream
by digital fine clamping within the ADV7188. The ADCs are
configured to run in 4× oversampling mode.
The ADV7188 has optional antialiasing filters on each of
the four input channels. The filters are designed for standard
definition (SD) video with approximately 6 MHz bandwidth.
SCART and overlay functionality are enabled by the ability of
the ADV7188 to process CVBS and standard definition RGB
signals simultaneously. Signal mixing is controlled by the fast
blank (FB) pin.
STANDARD DEFINITION PROCESSOR (SDP)
The ADV7188 is capable of decoding a large selection of baseband
video signals in composite, S-video, and component formats. The
video standards that are supported include PAL B/D/I/G/H,
PAL 60, PAL M, PAL N, PAL Nc, NTSC M/J, NTSC 4.43, and
SECAM B/D/G/K/L. The ADV7188 can automatically detect
the video standard and process it accordingly.
The ADV7188 has a 5-line, superadaptive, 2D comb filter that
provides superior chrominance and luminance separation when
decoding a composite video signal. This highly adaptive filter
automatically adjusts its processing mode according to the video
standard and signal quality without requiring user intervention.
Video user controls such as brightness, contrast, saturation, and
hue are also available within the ADV7188.
The ADV7188 implements the patented ADLLT algorithm to
track varying video line lengths from sources such as a VCR.
ADLLT enables the ADV7188 to track and decode poor quality
video sources such as VCRs and noisy sources from tuner outputs,
VCD players, and camcorders. The ADV7188 contains a CTI
processor that sharpens the edge rate of chroma transitions,
resulting in sharper vertical transitions.
The ADV7188 can process a variety of VBI data services, such
as closed captioning (CC), wide-screen signaling (WSS), copy
generation management system (CGMS), Gemstar® 1×/2×,
extended data service (XDS), and teletext. The ADV7188 is
fully Macrovision certified; detection circuitry enables Type I,
Type II, and Type III protection levels to be identified and
reported to the user. The decoder is also fully robust to all
Macrovision signal inputs.
FUNCTIONAL BLOCK DIAGRAM
AIN1– 12
AIN12
ANTI-
CLAMP ALIAS
FILTER
12
A/D
DATA
PREPROCESSOR
ANTI-
INPUT CLAMP ALIAS
MUX
FILTER
ANTI-
CLAMP ALIAS
FILTER
12
A/D
12
A/D
12
DECIMATION AND 12
DOWNSAMPLING 12
FILTERS
12
ANTI-
CLAMP ALIAS
FILTER
12
A/D
SYNC PROCESSING AND
CLOCK GENERATION
SYNC AND
CLK CONTROL
FB
ADV7188
SCLK
SDA
ALSB
SERIAL INTERFACE
CONTROL AND VBI DATA
CONTROL
AND DATA
CVBS/Y
FSC
RECOVERY
CVBS
C
Cr
CHROMA
DEMOD
Cb
R
G COLOR SPACE
B CONVERSION
STANDARD DEFINITION PROCESSOR
LUMA
FILTER
LUMA
RESAMPLE
LUMA
2D COMB
Y
(5H MAX)
SYNC
EXTRACT
CHROMA
FILTER
RESAMPLE
CONTROL
CHROMA
RESAMPLE
Y
Cr
Cb
CHROMA Cr
2D COMB
(4H MAX)
Cb
FAST BLANK
OVERLAY
CONTROL
AND
AV CODE
INSERTION
20
VBI DATA RECOVERY
MACROVISION
DETECTION
GLOBAL CONTROL
STANDARD
AUTODETECTION
SYNTHESIZED
LLC CONTROL
FREE-RUN
OUTPUT CONTROL
10 PIXEL
DATA
10 P19 TO P10
P9 TO P0
HS
VS
FIELD
LLC1
LLC2
SFL
INT
Figure 1.
Rev. A | Page 4 of 112
5 Page 
ADV7188
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
VS 1
HS 2
DGND 3
DVDDIO 4
P15 5
P14 6
P13 7
P12 8
DGND 9
DVDD 10
INT 11
SFL 12
TEST2 13
DGND 14
DVDDIO 15
TEST8 16
P11 17
P10 18
P9 19
P8 20
PIN 1
ADV7188
TOP VIEW
(Not to Scale)
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
60 AIN5
59 AIN11
58 AIN4
57 AIN10
56 AGND
55 CAPC2
54 CAPC1
53 AGND
52 CML
51 REFOUT
50 AVDD
49 CAPY2
48 CAPY1
47 AGND
46 AIN3
45 AIN9
44 AIN2
43 AIN8
42 AIN1
41 AIN7
Figure 5. 80-Lead LQFP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic Type
3, 9, 14, 31, 71 DGND
G
39, 47, 53, 56 AGND
G
4, 15
DVDDIO
P
10, 30, 72
DVDD
P
50
AVDD
P
38
PVDD
P
42, 44, 46, 58,
60, 62, 41, 43,
45, 57, 59, 61
AIN1 to
AIN12
I
11 INT O
40 FB I
70, 78, 13, 25,
69
77, 65
16
35 to 32,
24 to 17, 8 to 5,
76 to 73
2
1
80
67
TEST0 to
TEST4
TEST6 to
TEST7
TEST8
P0 to P19
HS
VS
FIELD
SDA
O
O
O
O
I/O
Description
Digital Ground.
Analog Ground.
Digital I/O Supply Voltage (3.3 V).
Digital Core Supply Voltage (1.8 V).
Analog Supply Voltage (3.3 V).
PLL Supply Voltage (1.8 V).
Analog Video Input Channels.
Interrupt Request Output. An interrupt occurs when certain signals are detected on the input
video. See the User Sub Map register details in Table 107.
Fast Blank. FB is a fast switch overlay input that switches between CVBS and RGB
analog signals.
Leave these pins unconnected.
Tie to AGND.
Tie to DVDDIO.
Video Pixel Output Ports.
Horizontal Synchronization Output Signal.
Vertical Synchronization Output Signal.
Field Synchronization Output Signal.
I2C Port Serial Data Input/Output.
Rev. A | Page 10 of 112
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADV7188.PDF ] | |
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