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PDF DS08MB200 Data sheet ( Hoja de datos )
| Número de pieza | DS08MB200 | |
| Descripción | Dual 800 Mbps 1:2/2:1 LVDS Mux/Buffer | |
| Fabricantes | National Semiconductor | |
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June 2006
DS08MB200
Dual 800 Mbps 1:2/2:1 LVDS Mux/Buffer
General Description
The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2
to 1 multiplexer. High-speed data paths and flow-through
pinout minimize internal device jitter and simplify board lay-
out. The differential inputs and outputs interface to LVDS or
Bus LVDS signals such as those on National’s 10-, 16-, and
18- bit Bus LVDS SerDes, or to CML or LVPECL signals.
The 3.3V supply, CMOS process, and robust I/O ensure high
performance at low power over the entire industrial -40 to
+85˚C temperature range.
Features
n Up to 800 Mbps data rate per channel
n LVDS/BLVDS/CML/LVPECL compatible inputs, LVDS
compatible outputs
n Low output skew and jitter
n On-chip 100Ω input termination
n 15 kV ESD protection on LVDS Inputs/Outputs
n Hot plug Protection
n Single 3.3V supply
n Industrial -40 to +85˚C temperature range
n 48-pin LLP Package
Typical Application
Block Diagram
20157420
20157401
FIGURE 1. DS08MB200 Block Diagram
© 2006 National Semiconductor Corporation DS201574
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Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
SUPPLY CURRENT (Static)
ICC Supply Current
All inputs and outputs enabled and
active, terminated with differential load
of 100Ω between OUT+ and OUT-.
ICCZ Supply Current - Powerdown ENA_0 = ENB_0 = ENL_0= ENA_1 =
Mode
ENB_1 = ENL_1 = L
SWITCHING CHARACTERISTICS — LVDS OUTPUTS
tLHT Differential Low to High Transition Use an alternating 1 and 0 pattern at
Time
200 Mb/s, measure between 20% and
tHLT Differential High to Low Transition 80% of VOD. (Note 15)
Time
tPLHD
tPHLD
Differential Low to High
Propagation Delay
Differential High to Low
Propagation Delay
Use an alternating 1 and 0 pattern at
200 Mb/s, measure at 50% VOD
between input to output.
tSKD1
tSKCC
Pulse Skew
Output Channel to Channel Skew
|tPLHD–tPHLD| (Note 15)
Difference in propagation delay (tPLHD
or tPHLD) among all output channels.
(Note 15)
tJIT Jitter
(Note 11)
RJ - Alternating 1 and 0 at 400 MHz
(Note 12)
DJ - K28.5 Pattern, 800 Mbps (Note 13)
TJ - PRBS 27-1 Pattern, 800 Mbps
(Note 14)
tON LVDS Output Enable Time
Time from ENA_n, ENB_n, or ENL_n to
OUT± change from TRI-STATE to
active.
tON2 LVDS Output Enable time from Time from ENA_n, ENB_n, or ENL_n to
powerdown mode
OUT± change from Powerdown to
active
tOFF LVDS Output Disable Time
Time from ENA_n, ENB_n, or ENL_n to
OUT± change from active to
TRI-STATE or powerdown.
Min
Typ
(Note 8)
225
0.6
170
170
1.0
1.0
25
50
1.3
15
16
0.5
10
Max
275
4.0
250
250
2.5
2.5
75
115
1.5
34
34
1.5
20
12
Units
mA
mA
ps
ps
ns
ns
ps
ps
psrms
psp-p
psp-p
µs
µs
ns
Note 8: Typical parameters are measured at VDD = 3.3V, TA = 25˚C. They are for reference purposes, and are not production-tested.
Note 9: Differential output voltage VOD is defined as ABS(OUT+–OUT−). Differential input voltage VID is defined as ABS(IN+–IN−).
Note 10: Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.
Note 11: Jitter is not production tested, but guaranteed through characterization on a sample basis.
Note 12: Random Jitter, or RJ, is measured RMS with a histogram including 1500 histogram window hits. The input voltage = VID = 500mV, 50% duty cycle at 400
MHz, tr = tf = 50ps (20% to 80%).
Note 13: Deterministic Jitter, or DJ, is measured to a histogram mean with a sample size of 350 hits. Stimulus and fixture jitter has been subtracted. The input
voltage = VID = 500mV, K28.5 pattern at 800 Mbps, tr = tf = 50ps (20% to 80%). The K28.5 pattern is repeating bit streams of (0011111010 1100000101).
Note 14: Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture jitter has been subtracted. The input voltage
= VID = 500mV, 27-1 PRBS pattern at 800 Mbps, tr = tf = 50ps (20% to 80%).
Note 15: Not production tested. Guaranteed by statistical analysis on a sample basis at the time of characterization.
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