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Número de pieza | ADS8365 | |
Descripción | Simultaneous Sampling SAR ANALOG-TO-DIGITAL CONVERTERS | |
Fabricantes | Burr-Brown Corporation | |
Logotipo | ||
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BurrĆBrown Products
from Texas Instruments
ADS8365 ®
ADS8365
SBAS362A – AUGUST 2006 – REVISED SEPTEMBER 2006
16-Bit, 250kSPS, 6-Channel, Simultaneous Sampling
SAR ANALOG-TO-DIGITAL CONVERTERS
FEATURES
• Six Input Channels
• Fully Differential Inputs
• Six Independent 16-Bit ADCs
• 4µs Total Throughput per Channel
• Low Power:
200mW in Normal Mode
5mW in Nap Mode
50µW in Power-Down Mode
• TQFP-64 Package Package
APPLICATIONS
• Motor Control
• Multi-Axis Positioning Systems
• 3-Phase Power Control
DESCRIPTION
The ADS8365 includes six, 16-bit, 250kSPS
analog-to-digital converters (ADCs) with six fully
differential input channels grouped into three pairs
for high-speed simultaneous signal acquisition.
Inputs to the sample-and-hold amplifiers are fully
differential and are maintained differential to the input
of the ADC. This architecture provides excellent
common-mode rejection of 80dB at 50kHz, which is
important in high-noise environments.
The ADS8365 offers a flexible, high-speed parallel
interface with a direct address mode, a cycle, and a
FIFO mode. The output data for each channel is
available as a 16-bit word.
CH A0+
CH A0-
HOLDA
CH A1+
CH A1-
CH B0+
CH B0-
HOLDB
CH B1+
CH B1-
CH C0+
CH C0-
HOLDC
CH C1+
CH C1-
REFIN
REFOUT
S/H
Amp
CDAC
Comp
SAR
S/H
Amp
S/H
Amp
CDAC
Comp
CDAC
Comp
SAR
S/H
Amp
S/H
Amp
CDAC
Comp
CDAC
Comp
SAR
S/H
Amp
Internal
2.5V
Reference
CDAC
Comp
Interface
Conversion
and
Control
FIFO
Register
a6nxd
A0
A1
A2
ADD
NAP
RD
WR
CS
FD
EOC
CLK
RESET
BYTE
16
Data
Input/Output
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
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ADS8365
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SBAS362A – AUGUST 2006 – REVISED SEPTEMBER 2006
ELECTRICAL CHARACTERISTICS: 100kSPS (continued)
Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.5V, fCLK = 2MHz,
and fSAMPLE = 100kSPS, unless otherwise noted.
ADS8365
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
DIGITAL OUTPUTS(4)
Logic family
LVCMOS
High-level output voltage
Low-level output voltage
High-impedance state output current
Output capacitance
Load capacitance
DATA FORMAT
VOH BVDD = 2.7V, IOH = –100µA
VOL BVDD = 2.7V, IOL = 100µA
IOZ CS = BVDD, VI = BVDD or GND
CO
CL
BVDD – 0.2
V
0.2 V
±50 nA
5 pF
30 pF
Data format
Bit DB4 = 1
Bit DB4 = 0
Binary two's complement
Straight binary coding
POWER SUPPLY
Analog supply voltage
Buffer I/O supply voltage
AVDD
Low-voltage levels
BVDD
5V logic levels
4.75
2.7
4.5
5.25
3.6
5.5
V
V
V
Analog operating supply current
Buffer I/O operating supply current
Power dissipation
AIDD
BVDD = 3V
BIDD BVDD = 5V
BVDD = 3V
BVDD = 5V
Nap mode enabled
38 45 mA
60 90 µA
100 150 µA
190 225 mW
190 225 mW
5 mW
Powerdown enabled
50 µW
(4) Applies for 3.0V nominal supply: BVDD (min) = 2.7V and BVDD (max) = 3.6V.
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ADS8365
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SBAS362A – AUGUST 2006 – REVISED SEPTEMBER 2006
TIMING INFORMATION
tC1
CLK
tW1
tD1
12
16
CONVERSION
tCONV
HOLDX
EOC
tW3
17 18 19 20
ACQUISITION
tACQ
tW2
1
2
CS
RD
D15–D8
D7–D0
tD4
tD6
tW6 tD5
tW5
tD7
Bits 15–8
Bits 7–0
Bits 15–8
Bits 7–0
BYTE
Figure 1. Read and Convert Timing
CS
WR
WR or CS
DB7:0
tD10
tW6
tD11
Figure 2. Write Timing
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11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet ADS8365.PDF ] |
Número de pieza | Descripción | Fabricantes |
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