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PDF ADL5390 Data sheet ( Hoja de datos )

Número de pieza ADL5390
Descripción RF/IF Vector Multiplier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Matched pair of multiplying VGAs
Broad frequency range 20 MHz to 2.4 GHz
Continuous magnitude control from +5 dB to −30 dB
Output third-order intercept 24 dBm
Output 1 dB compression point 11 dBm
Output noise floor −148 dBm/Hz
Adjustable modulation bandwidth up to 230 MHz
Fast output power disable
Single-supply voltage 4.75 V to 5.25 V
APPLICATIONS
PA linearization and predistortion
Amplitude and phase modulation
Variable matched attenuator and/or phase shifter
Cellular base stations
Radio links
Fixed wireless access
Broadband/CATV
RF/IF analog multiplexer
GENERAL DESCRIPTION
The ADL5390 vector multiplier consists of a matched pair of
broadband variable gain amplifiers whose outputs are summed.
The separate gain controls for each amplifier are linear-in-
magnitude. If the two input RF signals are in quadrature, the
vector multiplier can be configured as a vector modulator or as
a variable attenuator/phase shifter by using the gain control pins
as Cartesian variables. In this case, the output amplitude can be
controlled from a maximum of +5 dB to less than –30 dB, and
the phase can be shifted continuously over the entire 360°
range. Since the signal paths are linear, the original modulation
on the inputs is preserved. If the two signals are independent,
then the vector multiplier can function as a 2:1 multiplexer or
can provide fading from one channel to another.
The ADL5390 operates over a wide frequency range of 20 MHz
to 2400 MHz. For a maximum gain setting on one channel at
380 MHz, the ADL5390 delivers an OP1dB of 11 dBm, an OIP3
of 24 dBm, and an output noise floor of −148 dBm/Hz. The gain
and phase matching between the two VGAs is better than 0.5 dB
and 1°, respectively, over most of the operating range.
RF/IF Vector Multiplier
ADL5390
FUNCTIONAL BLOCK DIAGRAM
VPRF QBBP OBBM
VPS2
INMQ
INPQ
CMRF
INPI
INMI
RFOP
RFOM
CMOP IBBP IBBM
DSOP
Figure 1.
The gain control inputs are dc-coupled with a +/−500 mV dif-
ferential full-scale range centered about a 500 mV common
mode. The maximum modulation bandwidth is 230 MHz,
which can be reduced by adding external capacitors to limit the
noise bandwidth on the control lines.
Both the RF inputs and outputs can be used differentially or
single-ended and must be ac-coupled. The impedance of each
VGA RF input is 250 Ω to ground, and the differential output
impedance is nominally 50 Ω over the operating frequency
range. The DSOP pin allows the output stage to be disabled
quickly to protect subsequent stages from overdrive. The
ADL5390 operates off supply voltages from 4.75 V to 5.25 V
while consuming 135 mA.
The ADL5390 is fabricated on Analog Devices’ proprietary,
high performance 25 GHz SOI complementary bipolar IC
process. It is available in a 24-lead, Pb-free CSP package and
operates over a −40°C to +85°C temperature range. Evaluation
boards are available.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
DataSheet4 U .com
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.

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ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameters
Rating
Supply Voltage VPRF, VPS2
DSOP
5.5 V
5.5 V
IBBP, IBBM, QBBP, QBBM
2.5 V
RFOP, RFOM
5.5 V
RF Input Power at Maximum Gain
10 dBm for 50 Ω
(INPI or INPQ, Single-Ended Drive)
Equivalent Voltage
Internal Power Dissipation
θJA (With Pad Soldered to Board)
Maximum Junction Temperature
2.0 V p-p
825 mW
59°C/W
125°C
Operating Temperature Range
−40°C to +85°C
Storage Temperature Range
−65°C to +150°C
ADL5390
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational sec-
tion of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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ADL5390 arduino
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GENERAL STRUCTURE
THEORY OF OPERATION
The simplified block diagram given in Figure 26 shows a
matched pair of variable gain channels whose outputs are
summed and presented to the final output. The RF/IF signals
propagate from the left to the right, while the baseband gain
controls are placed above and below. The proprietary linear-
responding variable attenuators offer excellent linearity, low
noise, and greater immunity from mismatches than other
commonly used methods.
Since the two independent RF/IF inputs can be combined in
arbitrary proportions, the overall function can be termed
“vector multiplication” as expressed by
VOUT = VIRF × (VIBB/VO) + VQRF × (VQBB/VO)
where:
VIRF and VQRF are the RF/IF input vectors.
VIBB and VQBB are the baseband input scalars.
VO is the built-in normalization factor, which is designed to be
0.285 V (1/3.5 V).
The overall voltage gain, in linear terms, of the I and Q channels
is proportional to its control voltage and scaled by the normali-
zation factor, i.e., a full-scale gain of 1.75 (5 dB) for VI (Q)BB of
500 mV. A full-scale voltage gain of 1.75 defines a gain setpoint
of 1.0.
Due to its versatile functional form and wide signal dynamic
range, the ADL5390 can form the core of a variety of useful
functions such as quadrature modulators, gain and phase ad-
justers, and multiplexers. At maximum gain on one channel, the
output 1 dB compression point and noise floor referenced to
50 Ω are 11 dBm and −148 dBm/Hz, respectively. The broad
frequency response of the RF/IF and gain control ports allows
the ADL5390 to be used in a variety of applications at different
frequencies. The bandwidth for the RF/IF signal path extends
from approximately 20 MHz to beyond 2.4 GHz, while the gain
controls signals allow for modulation rates greater than 200 MHz.
Matching between the two gain channels is ensured by careful
layout and design. Since they are monolithic and arranged
symmetrically on the die, thermal and process gradients are
minimized. Typical gain and phase mismatch at maximum gain
are <0.5 dB and <0.5°.
ADL5390
VIRF,
I CHANNEL
SINGLE-ENDED
OR DIFFERENTIAL
VQRF,
Q CHANNEL
SINGLE-ENDED
OR DIFFERENTIAL
I CHANNEL
BASEBAND INPUT
VIBB
V-I
LINEAR
ATTENUATOR
SINGLE-ENDED
I-V OR DIFFERENTIAL
50OUTPUT
LINEAR
V-I ATTENUATOR OUTPUT
DISABLE
VQBB
Q CHANNEL
BASEBAND INPUT
Figure 26. Simplified Architecture of the ADL5390
NOISE AND DISTORTION
The signal path for a particular channel of the ADL5390 con-
sists basically of a preamplifier followed by a variable attenuator
and then an output driver. Each subblock contributes some level
of noise and distortion to the desired signal. As the channel gain
is varied, these relative contributions change. The overall effect
is a dependence of output noise floor and output distortion
levels on the gain setpoint.
For the ADL5390, the distortion is always determined by the
preamplifier. At the highest gain setpoint, the signal capacity, as
described by the 1 dB compression point (P1dB) and the third-
order intercept (OIP3), are at the highest levels. As the gain is
reduced, the P1dB and OIP3 are reduced in exact proportion.
At the higher gain setpoints, the output noise is dominated by
the preamplifier as well. At lower gains, the contribution from
the preamplifier is correspondingly reduced and eventually a
noise floor, set by the output driver, is reached. As Figure 27
illustrates, the overall dynamic range defined as a ratio of OIP3
to output noise floor remains constant for the higher gain
setpoints. At some gain level, the noise floor levels off and the
dynamic range degrades commensurate with the gain reduction.
175
DYNAMIC RANGE = OIP3 – (OUTPUT NOISE
FLOOR (NO CARRIER))
170
165
160
155
150
145
140
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
GAIN SETPOINT
Figure 27. Dynamic Range Variation with Gain Setpoint
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