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PDF DAC8551 Data sheet ( Hoja de datos )

Número de pieza DAC8551
Descripción VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER
Fabricantes Burr-Brown Corporation 
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No Preview Available ! DAC8551 Hoja de datos, Descripción, Manual

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BurrĆBrown Products
from Texas Instruments
DAC8551
SLAS429A – APRIL 2005 – REVISED JULY 2005
16-BIT, ULTRA-LOW GLITCH, VOLTAGE OUTPUT
DIGITAL-TO-ANALOG CONVERTER
FEATURES
DESCRIPTION
16-Bit Monotonic Over Temperature
Relative Accuracy: 8 LSB (Max)
Glitch Energy: 0.1 nV-s
Settling Time: 10 µs to ±0.003% FSR
Power Supply: +2.7 V to +5.5 V
MicroPower Operation: 200 µA at 5 V
Rail-to-Rail Output Amplifier
Power-On Reset to Zero
Power-Down Capability
Schmitt-Triggered Digital Inputs
SYNC Interrupt Facility
Drop-In Compatible With DAC8531/01
Operating Temperature Range: -40°C to 105°C
The DAC8551 is a small, low-power, voltage output,
16-bit digital-to-analog converter (DAC). It is
monotonic, provides good linearity, and minimizes
undesired code-to-code transient voltages. The
DAC8551 uses a versatile 3-wire serial interface that
operates at clock rates to 30 MHz and is compatible
with standard SPI™, QSPI™, Microwire™, and digital
signal processor (DSP) interfaces.
The DAC8551 requires an external reference voltage
to set its output range. The DAC8551 incorporates a
power-on-reset circuit that ensures the DAC output
powers up at 0 V and remains there until a valid write
takes place to the device. The DAC8551 contains a
power-down feature, accessed over the serial
interface, that reduces the current consumption of the
device to 200 nA at 5 V.
Available Package:
– 3 mm × 5 mm MSOP-8
APPLICATIONS
Process Control
The low-power consumption of this device in normal
operation makes it ideally suited for portable battery-
operated equipment. The power consumption is
1.00 mW at 5 V, reducing to 1 µW in power-down
DataSheet4mU.ocdoem.
Data Acquisition Systems
The DAC8551 is available in an MSOP-8 package.
Closed-Loop Servo-Control
PC Peripherals
Portable Instrumentation
Programmable Attenuation
FUNCTIONAL BLOCK DIAGRAM
VDD
VFB
DataShee
VREF
Ref (+)
16−Bit DAC
VOUT
16
DAC Register
SYNC
SCLK
DIN
16
Shift Register
PWD Control
Resistor
Network
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI, QSPI are trademarks of Motorola.
DataSheet4UM.iccroomwire is a trademark of National Semiconductor.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated

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DAC8551
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SLAS429A – APRIL 2005 – REVISED JULY 2005
TIMING REQUIREMENTS(1)(2)
VDD = 2.7 V to 5.5 V, all specifications –40°C to 105°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
t
(3)
1
SCLK cycle time
t 2 SCLK HIGH time
t 3 SCLK LOW time
t 4 SYNC to SCLK rising edge setup time
t 5 Data setup time
t 6 Data hold time
t 7 SCLK falling edge to SYNC rising edge
t 8 Minimum SYNC HIGH time
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
50
ns
33
13
ns
13
22.5
ns
13
0
ns
0
5
ns
5
4.5
ns
4.5
0
ns
0
50
ns
33
et4U.com
(1) All input signals are specified with tR = tF = 3 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.
(2) See Serial Write Operation timing diagram.
(3) Maximum SCLK frequency is 30 MHz at VDD = 3.6 V to 5.5 V and 20 MHz at VDD = 2.7 V to 3.6 V.
SERIAL WRITE OPERATION
SCLK
SYNC
t8
t4
DataSheet4U.com
t1
t3 t2 t7
t6
t5
DIN DB23
DB0
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DAC8551
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TYPICAL CHARACTERISTICS: VDD = 2.7 V (continued)
At TA = 25°C, unless otherwise noted
SLAS429A – APRIL 2005 – REVISED JULY 2005
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT
CODE
(105°C)
6
4 VDD = 2.7 V, VREF = 2.69 V
2
0
−2
−4
−6
1
0.5
0
−0.5
−1
0
8192 16384 24576 32768 40960 49152 57344 65536
Digital Input Code
Figure 29.
ZERO-SCALE ERROR
vs
TEMPERATURE
10
VDD = 2.7 V, VREF = 2.69 V
5
0
−5
−40
0 40 80
Temperature − 5C
Figure 30.
120
et4U.com
FULL-SCALE ERROR
vs
TEMPERATURE
5
VDD = 2.7 V, VREF = 2.69 V
0
1500
1200
DataSheet4U.com
900
IDD HISTOGRAM
VDD = VREF = 2.7 V
Reference Current Included
DataShee
600
−5
300
−10
−40
0 40 80
Temperature − 5C
Figure 31.
120
SOURCE AND SINK CURRENT CAPABILITY
3
2.5 DAC Loaded With FFFFH
2
VDD = 2.7 V
1.5
VREF = VDD − 10 mV
1
0.5
0
0
DAC Loaded With 0000H
3
5
I(SOURCE/SINK) − mA
Figure 33.
DataSheet4U.com
8
10
0
120 140 160 180 200 220 240 260 280 300
IDD − Supply Current − mA
Figure 32.
SUPPLY CURRENT
vs
DIGITAL INPUT CODE
180
160 VDD = VREF = 2.7 V
140
120
Reference Current Included
100
80
60
40
20
0
0
8192 16384 24576 32768 40960 49152 57344 65536
Digital Input Code
Figure 34.
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