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89C669 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 89C669
Beschreibung P89C669
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
89C669 Datasheet, Funktion
P89C669
80C51 8-bit microcontroller family with extended memory;
96 kB Flash with 2 kB RAM
Rev. 02 — 13 November 2003
Product data
1. General description
The P89C669 represents the first Flash microcontroller based on Philips
Semiconductors’ new 51MX core. The P89C669 features 96 kbytes of Flash program
memory and 2 kbytes of data SRAM. In addition, this device is equipped with a
Programmable Counter Array (PCA), a watchdog timer that can be configured to
different time ranges through SFR bits, as well as two enhanced UARTs and byte
based I2C-bus serial interface.
Philips Semiconductors’ 51MX (Memory eXtension) core is an accelerated 80C51
architecture that executes instructions at twice the rate of standard 80C51 devices.
The linear address range of the 51MX has been expanded to support up to 8 Mbytes
of program memory and 8 Mbytes of data memory. It retains full program code
compatibility to enable design engineers to re-use 80C51 development tools,
eliminating the need to move to a new, unfamiliar architecture. The 51MX core also
retains 80C51 bus compatibility to allow for the continued use of 80C51-interfaced
peripherals and Application Specific Integrated Circuits (ASICs).
The P89C669 provides greater functionality, increased performance and overall lower
system cost. By offering an embedded memory solution combined with the
enhancements to manage the memory extension, the P89C669 eliminates the need
for software work-arounds. The increased program memory enables design
engineers to develop more complex programs in a high-level language like C, for
example, without struggling to contain the program within the traditional 64 kbytes of
program memory. These enhancements also greatly improve C Language efficiency
for code size below 64 kbytes.
The P89C669 device contains a non-volatile Flash program memory that is both
parallel programmable and serial In-System and In-Application Programmable.
In-System Programming (ISP) allows the user to download new code while the
microcontroller sits in the application. In-Application Programming (IAP) means that
the microcontroller fetches new program code and reprograms itself while in the
system. This allows for remote programming over a modem link. A default serial
loader (boot loader) program in ROM allows serial In-System programming of the
Flash memory via the UART without the need for a loader in the Flash code. For
In-Application Programming, the user program erases and reprograms the Flash
memory by use of standard routines contained in ROM.
The 51MX core is described in more detail in the 51MX Architecture Reference.






89C669 Datasheet, Funktion
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
6. Pinning information
6.1 Pinning
6.1.1 Plastic leaded chip carrier
P1.5/CEX2 7
P1.6/SCL 8
P1.7/SDA 9
RST 10
P3.0/RXD0 11
RXD1 12
P3.1/TXD0 13
P3.2/INT0 14
P3.3/INT1 15
P3.4/CEX3/T0 16
P3.5/CEX4/T1 17
P89C669FA
Fig 3. PLCC44 pin configuration.
39 P0.4/AD4
38 P0.5/AD5
37 P0.6/AD6
36 P0.7/AD7
35 EA/VPP
34 TXD1
33 ALE
32 PSEN
31 P2.7/A15
30 P2.6/A14/A22
29 P2.5/A13/A21
002aaa404
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6 of 33

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89C669 pdf, datenblatt
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
7.2 Memory arrangement
P89C669 has 96 kbytes of Flash (MX universal map range: 80:0000-81:7FFF) and
2 kbytes of on-chip RAM:
Table 4: Memory arrangement
Data memory
Size (Bytes) and MX
universal memory
map range
Type Description
P89C669
DATA
memory that can be addressed both directly and
indirectly; can be used as stack
128
(7F:0000-7F:007F)
IDATA
superset of DATA; memory that can be addressed
256
indirectly (where direct address for upper half is for SFR (7F:0000-7F:00FF)
only); can be used as stack
EDATA
superset of DATA/IDATA; memory that can be addressed 1280
indirectly using Universal Pointers (PR0,1); can be used (7F:0000-7F:04FF)
as stack
XDATA memory (on-chip ‘External Data’) that is accessed via 768
the MOVX/EMOV instructions using DPTR/EPTR
(00:0000-00:02FF)
For more detailed information, please refer to the P89C669 User Manual.
7.3 Special function registers
Special Function Register (SFR) accesses are restricted in the following ways:
User must not attempt to access any SFR locations not defined.
Accesses to any defined SFR locations must be strictly for the functions for the
SFRs.
SFR bits labeled ‘-’, ‘0’, or ‘1’ can only be written and read as follows:
‘-’ must be written with ‘0’, but can return any value when read (even if it was
written with ‘0’). It is a reserved bit and may be used in future derivatives.
‘0’ must be written with ‘0’, and will return a ‘0’ when read.
‘1’ must be written with ‘1’, and will return a ‘1’ when read.
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
12 of 33

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