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DM8108 Schematic ( PDF Datasheet ) - Davicom

Teilenummer DM8108
Beschreibung 8 port 10/100M Fast Ethernet Switching Controller
Hersteller Davicom
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Gesamt 30 Seiten
DM8108 Datasheet, Funktion
www.DataSheet4U.com
DM8108
8 port 10/100M Fast Ethernet Switching Controller
General Description
The DM8108 is an 8 port 10/100Mbit/s nonblocking
Ethernet switch with on-chip address-lookup engine. The
DM8108 provides a low-cost, high-performance switch
solution with PHYs and single SGRAM.
The DM8108 provides eight 10/100Mbit/s Fast Ethernet
interface. In half-duplex mode, all ports support back-
pressure capability to reduce the risk of data loss for a long
burst of activity. In the full-duplex mode of operation, the
device uses IEEE std. 802.3 frame-based pause protocol
for flow control. With full-duplex capability, port 0 – 7 support
1.6Gbit/s aggregate bandwidth connections. The DM8108
also supports port trunking/load balancing on the
10/100Mbit ports. This can be used to group ports on inter-
switch links to increase the effective bandwidth between the
systems.
The internal address-lookup engine supports up to 16.25K
unicast and unlimited multicast and broadcast addresses.
This engine performs destination and source addresses
book-keeping and comparison which also forwards
unknown destination address packets to all ports.
The DM8108 is fabricated with a .35um technology.
Working at 3.3V, the inputs are 5V tolerant and the outputs
are capable of directly driving at TTL levels.
Block Diagram
Control &
www.DataStatSus heet4U.com
Address
Learning
Expansion
MEM
Controller
Switching
Engine
LED Control
Unit
Preliminary
Version: DM8108-DS-P02
November 25, 1999
1
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DM8108 Datasheet, Funktion
www.DataSheet4U.com
DM8108
8 port 10/100M Fast Ethernet Switching Controller
Pin Description
Pin Assignment
# NAME
# NAME
# NAME
# NAME
# NAME
1 VSS
43 CRS2
85 TXEN4
127 RXCLK7
169 MD(4)
2 LEDCLK
44 RXCLK2
86 TXD4(0)
128 RXD7(0)
170 MD(3)
3 LEDSTB
45 RXD2(0)
87 TXD4(1)
129 RXD7(1)
171 MD(2)
4 LEDD
46 RXD2(1)
88 TXD4(2)
130 RXD7(2)
172 MD(1)
5 RST*
47 RXD2(2)
89 TXD4(3)
131 RXD7(3)
173 MD(0)
6 TESTEN* 48 RXD2(3)
90 VDD
132 TXCLK7
174 VSS
7 VSS
49 TXCLK2
91 RXER5
133 TXEN7
175 SCLK
8 RXER0
50 TXEN2
92 RXDV5
134 TXD7(0)
176 VSS
9 RXDV0
51 TXD2(0)
93 COL5
135 TXD7(1)
177 SRAS*
10 COL0
52 TXD2(1)
94 CRS5
136 TXD7(2)
178 SDCAS*
11 CRS0
53 TXD2(2)
95 RXCLK5
137 TXD7(3)
179 SDCS*
12 RXCLK0
54 TXD2(3)
96 RXD5(0)
138 VSS
180 SDWE*
13 RXD0(0)
55 VDD
97 RXD5(1)
139 MD(31)
181 VSS
14 RXD0(1)
56 RXER3
98 RXD5(2)
140 MD(30)
182 SDQM*
15 RXD0(2)
57 RXDV3
99 RXD5(3)
141 MD(29)
183 MA(10) – SBA
16 RXD0(3)
58 COL3
100 TXCLK5
142 MD(28)
184 MA(9)
17 TXCLK0
www.DataSheet4U.com18 TXEN0
59 CRS3
60 RXCLK3
101 TXEN5
102 TXD5(0)
143 MD(27)
144 MD(26)
185 VDD
186 MA(8)
19 TXD0(0)
61 RXD3(0)
103 TXD5(1)
145 MD(25)
187 MA(7)
20 TXD0(1)
62 RXD3(1)
104 TXD5(2)
146 MD(24)
188 MA(6)
21 TXD0(2)
63 RXD3(2)
105 TXD5(3)
147 VSS
189 MA(5)
22 TXD0(3)
64 RXD3(3)
106 VSS
148 MD(23)
190 VSS
23 VDD
65 TXCLK3
107 RXER6
149 MD(22)
191 MA(4)
24 RXER1
66 TXEN3
108 RXDV6
150 MD(21)
192 MA(3)
25 RXDV1
67 TXD3(0)
109 COL6
151 MD(20)
193 MA(2)
26 COL1
68 TXD3(1)
110 CRS6
152 MD(19)
194 MA(1)
27 CRS1
69 TXD3(2)
111 RXCLK6
153 MD(18)
195 MA(0)
28 RXCLK1
70 TXD3(3)
112 RXD6(0)
154 MD(17)
196 VSS
29 RXD1(0)
71 VSS
113 RXD6(1)
155 MD(16)
197 TXENCLK
30 RXD1(1)
72 MDCLK
114 RXD6(2)
156 VDD
198 VDD
31 RXD1(2)
73 MDIO
115 RXD6(3)
157 MD(15)
199 TXD8(0)
32 RXD1(3)
74 VSS
116 TXCLK6
158 MD(14)
200 TXD8(1)
33 TXCLK1
75 RXER4
117 TXEN6
159 MD(13)
201 TXD8(2)
34 TXEN1
76 RXDV4
118 TXD6(0)
160 MD(12)
202 TXD8(3)
35 TXD1(0)
77 COL4
119 TXD6(1)
161 MD(11)
203 VSS
36 TXD1(1)
78 CRS4
120 TXD6(2)
162 MD(10)
204 RXDVCLK
37 TXD1(2)
79 RXCLK4
121 TXD6(3)
163 MD(9)
205 RXD8(0)
38 TXD1(3)
80 RXD4(0)
122 VDD
164 MD(8)
206 RXD8(1)
39 VSS
81 RXD4(1)
123 RXER7
165 VSS
207 RXD8(2)
40 RXER2
82 RXD4(2)
124 RXDV7
166 MD(7)
208 RXD8(3)
41 RXDV2
83 RXD4(3)
125 COL7
167 MD(6)
42 COL2
84 TXCLK1
126 CRS7
168 MD(5)
6 Preliminary
Version: DM8108-DS-P02
November 25, 1999
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6 Page









DM8108 pdf, datenblatt
www.DataSheet4U.com
DM8108
8 port 10/100M Fast Ethernet Switching Controller
Operation Overview
The SW Architecture Family of switching devices has The DM8108 automatically learns the port number of
been defined as low cost, high performance and
attached network devices by examining the Source
scalable architecture for a small switching system of
MAC address of all incoming packets. If the Source
packetized data. Various devices will be developed.
Address is not found in the Address Table, the device
The OEMs will be able to design robust switching
adds it to the table (with source port and device
configurations based on the SW architecture.
information). The Address Table is managed by
DM8108 individually.
The SW Architecture Family uses a “store-and-
forward’ switching approach. This approach has the Address Learning
following advantages:
The DM8108 can learn up to 16K unique MAC addresses.
Store-and-forward switches allow switching
Addresses are stored in the Address Table located in the
between differing speed media (e.g. 10Mbps and DRAM which will be initialized after RESET.
100Mbps).
Store-and-forward switches improve overall
Packet Buffering
network performance by acting as a ‘network
cache’,
effectively buffering packets during Incoming packets are buffered in the DRAM array. These
times of heavy congestion.
buffers provide elastic storage for transferring data between
Store-and-forward switches prevent the
low-speed and high speed segments. The packet buffers
erroneous packets from forwarding by analyzing
are managed automatically by the DM8108.
the frame check sequence (FCS) before
www.DataSheet4U.comforwarding to the destination port.
Packet Forwarding Protocol
Store-and-forward switches prevent illegal
frames (runt or oversized) from being forwarded
The DM8108 updates the Transmit Descriptor of the target
and
thereby reduce the congestion caused
port, which is learned from Address Table, with the received
by bad packets.
packet buffer location and packet length. The MAC of
target port will fetch the packet for transmission once the
The basic operation of DM8108 is very simple. The
memory bus is available.
DM8108 receives the incoming packets from the
Ethernet ports, searches in the Address Table for the Expansion Bus
destination MAC address, and forwards the packet to
the appropriate port, which could be either local (one
The Expansion Bus is defined as a special case of a normal
of the DM8108’s port) or in a different DM8108
Fast Ethernet MII port except running at much higher data
device that resides on the expansion bus. If the
rate.
destination address is not found, the packet will be
treated as a multicast packet and sent to every port
The designer can link several DM8108s within a switching
(other than the source port) and other devices on the box or can link several switching boxes.
expansion bus.
12 Preliminary
Version: DM8108-DS-P02
November 25, 1999
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12 Page





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