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PDF EN5330 Data sheet ( Hoja de datos )
| Número de pieza | EN5330 | |
| Descripción | 3A Voltage Mode Synchronous Buck PWM DC-DC Converter | |
| Fabricantes | Enpirion | |
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EN5330
3A Voltage Mode Synchronous Buck PWM
DC-DC Converter with Integrated Inductor
RoHS Compliant
Description
The EN5330 is a Power System on a Chip DC-
DC converter. It is specifically designed to meet
the precise voltage and fast transient
requirements of present and future high-
performance, low-power processor, DSP, FPGA,
memory boards and system level applications in
a distributed power architecture. Advanced circuit
techniques, ultra high switching frequency, and
very advanced, high-density, integrated circuit
and proprietary inductor technology deliver high-
quality, ultra compact, non-isolated DC-DC
conversion. Operating this converter requires
only three external components that include
small value input and output ceramic capacitors
and a soft-start capacitor.
The EN5330 significantly helps in system design
and productivity by offering greatly simplified
board design, layout and manufacturing
requirements. In addition, a reduction in the
number of vendors required for the complete
power solution helps to enable an overall system
cost savings.
Features
• Up to 10W output power (at VOUT=3.3V)
• External inductor is NOT required
• RoHS compliant, MSL3 rated to 260°C
• 5MHz operating frequency
• More than 90% efficient
• VOUT accuracy of 2% over line, load and
temperature
• 1/3 the board area of discrete component
solutions
• Very fast transient response
• All high speed switching signals contained
inside the part
• Wide input voltage range of 2.375V to 5.5V
• Digital voltage selector with options for
common output voltages from 0.8V to 3.3V
• External resistor divider and OVP option for
output voltages from 0.8V to VIN-600mV
• Output enable pin and Power OK signal
• Programmable soft-start time
• Over-current protection
• Thermal shutdown, short circuit, output over-
voltage and input under-voltage protection
Typical Application Circuit
VIN
22µF
PVIN
AVIN
VS0
VS1
VS2
POK VSENSE
SS VOUT
15nF
AGND PGND
VID Output
Voltage Select
VOUT
47µF
Applications
• Servers, workstations and PCs
• Broadband, networking, LAN/WAN, optical
telecommunications equipment
• Point of load regulation for low-power
processors, network processors, DSPs,
FPGAs, and ASICs
• Low voltage, distributed power architectures
with 2.5V, 3.3V or 5V rails
Ordering Information
Part Number
EN5330DC
EN5330DC-T
EN5330DI
EN5330DI-T
EN5330DC-E
Temp Rating
(°C) Package
0 to 70
36-pin DFN
0 to 70
36-pin DFN T&R
-40 to +85
36-pin DFN
-40 to +85
36-pin DFN T&R
DFN Evaluation Board
Rev 1.01 – January 2006
1
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Rev 1.01 – January 2006
EN5330
Electrical Characteristics
NOTE: VIN=3.3V and over operating temperature range unless otherwise noted. Typical values are at
TA = 25°C.
PARAMETER
Operating Input
Voltage
Quiescent Supply
Current
No-Load Operating
Current
Switching
Frequency
Thermal Overload
Trip Point
SYMBOL
TEST CONDITIONS
VIN
IQ
No switching, AVIN = 3.3V,
PVIN = 3.3V, ENABLE=0V
INL
Includes PWM, gate drive and
inductor ripple current.
FOSC
TJ
MIN
2.375
TYP
15
45
5
160
MAX UNITS
5.5 V
mA
mA
MHz
°C
VOUT
Range
Accuracy
Line Regulation
Load Regulation
Temperature
Regulation
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
Using external voltage divider
Over line, load and temperature
VIN = 2.5 to 5.0 volts
ILOAD = 0 to 3A
TA= 0 to 70ºC
TA= -40 to 85ºC
0.8
±2.0
3
3
+0.25
-0.45
+0.65
-0.55
V
%
mV
mV
%
%
Transient Response (IOUT = 0% to 100% or 100% to 0% of Rated Load)
Peak Deviation
VOUT
VIN = 5V, 1.2V < VOUT < 3.3V
Output Voltage Ripple (with 5 x 10µF X5R or X7R ceramic capacitors)
Peak-to-peak
VOUT-PP
VIN = 5.0V, VOUT = 1.2V, IOUT = 3A,
COUT = 50uF, 5 x 10µF X5R or X7R
ceramic capacitors
35 %
20 mV
Output Current (Note 3)
Max Continuous
Output Current
IOUT
Over-Current
Threshold
IOCP
Short-Circuit
Current
ISC
3
4.5
4
A
A
A
Enable Operation
Disable Threshold
Enable Threshold
VDISABLE
VENABLE
Max voltage to ensure the converter
is disabled
Min voltage to ensure the converter
is enabled
1.8
0.8 V
V
Power OK Operation
POK low voltage
VPOK
IPOK = 1mA
0.4
Max POK Voltage
VPOK
Supply voltage applied to POK
5.5
NOTES:
3. Maximum output current may need to be de-rated, based on operating condition, to meet TJ requirements.
V
V
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Rev 1.01 – January 2006
EN5330
Landing Pad Information
The Enpirion DFN package is footprint compatible with the JEDEC standard 36-pin TSSOP package
code DD. The reference document and board layout diagram appear below.
NOTE: JEDEC Solid State Technology Association TSSOP (Plastic Thin Shrink Small Outline Package)
standardized package code DD. This TSSOP standard package is defined in the JEDEC document MO-153,
Issue F, dated 05/01, which defines 57 variations on package size, lead pitch, and lead count.
Contact Information
Enpirion, Inc.
685 Route 202/206
Suite 305
Bridgewater, NJ 08807
Phone: 908-575-7550
Fax: 908-575-0775
Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is
believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may
result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment
used in hazardous environment without the express written authority from Enpirion.
11 www.enpirion.com
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet EN5330.PDF ] | |
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