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CDB4461 Schematic ( PDF Datasheet ) - Cirrus Logic

Teilenummer CDB4461
Beschreibung Multi-Bit A/D for Class-D Real-Time PSR Feedback
Hersteller Cirrus Logic
Logo Cirrus Logic Logo 




Gesamt 11 Seiten
CDB4461 Datasheet, Funktion
www.DataSheet4U.com
CS4461
Multi-Bit A/D for Class-D Real-Time PSR Feedback
Features
z Advanced Multi-bit Delta-Sigma Architecture
z Real-time Feedback of Power Supply
Conditions (AC and DC)
z Filterless Digital Output Resulting in Very Low
Signal Delay
z 135 mW Power Consumption
z Supports Logic Levels Between 3.3 V and
5.0 V
z Differential Analog Architecture
z Modulator Overflow Detection
z Interfaces Directly to the CS44800/CS44600
Class-D PWM Modulator
z Multi-bit Conversion at up to 7.5 MHz
z Delivers Modulated Data Over 2-Wire Interface
General Description
The CS4461 is a complete analog-to-digital converter
for class-D real-time power supply rejection (PSR) feed-
back. It performs sampling and analog-to-digital
conversion, generating digital data for input to a
class-D modulator with real-time PSR feedback
capabilities.
The CS4461 uses a 5th-order, multi-bit delta-sigma
modulator followed by output data formatting. The ADC
uses a differential architecture which provides excellent
noise rejection.
The CS4461 feeds back the AC and DC voltage compo-
nents and is ideal for class-D audio systems requiring
high power supply rejection.
The CS4461 is available in a 24-pin TSSOP package in
both Commercial (-10° to +70° C) and Automotive
grade (-40° to +85° C). The CDB44800 Customer Dem-
onstration board is also available for device evaluation
and implementation suggestions. Please see “Ordering
Information” on page 11 for complete details.
FILT+
VQ REFGND
Voltage Reference
PSR_RESET PSR_EN
AIN+
AIN-
+
-
S/H
LP Filter
DAC
∆Σ
Output Data
Formatting
OVERFLOW
PSR_MCLK
PSR_SYNC
PSR_DATA
www.DataSheet4U.com
http://www.cirrus.com
5.0 V
(VA)
GND
3.3 V to 5.0 V
(VDP)
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
SEPTEMBER '05
DS650F1






CDB4461 Datasheet, Funktion
www.DataSheet4U.com
2. PIN DESCRIPTIONS
CS4461
PSR_RESET
GND
PSR_SYNC
PSR_DATA
PSR_MCLK
VDP
GND
VDP
TEST
GND
PSR_EN
GND
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10
Top-Down View
15
11 24-pin TSSOP Package 14
12 13
FILT+
REFGND
VQ
GND
GND
VA
GND
AIN-
AIN+
OVERFLOW
VDP
VDP
Pin Name
VDP
VA
GND
# Pin Descriprion
6
8 Digital Logic Power (Input) – Digital core and input/output power supply. Nominally +3.3 V or +5.0 V.
13 Supply decoupling should placed as close as possible to pin 6.
14
19 Analog Power (Input) - Analog power supply. Nominally +5.0 V.
2
7
10
12 Ground (Input) - Ground reference for both analog and digital.
18
20
21
Reset (Input) - When PSR_RESET is low, the CS4461 enters a low power mode and all internal states
PSR_RESET 1 are reset. On initial power up, PSR_RESET must be held low until the power supply is stable, and all
input clocks are stable in frequency and phase.
VQ 22 Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
REFGND
23 Reference Ground (Input) - Ground reference for the internal sampling circuits.
FILT+
24 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuit.
AIN+
AIN-
16 Differential PSR Analog Input (Input) - Signals are presented differentially to the delta-sigma modula-
17 tor via the AIN+/- pins.
PSR_MCLK
5 Master Clock (Input) - Clock source for the delta-sigma modulator and output data.
PSR_SYNC
3 Synchronization Data Output (Output) - Used to synchronize the serial data in the PWM modulator.
PSR_DATA
4 PSR Serial Data Output (Output) - Power supply modulated and formatted serial data.
PSR_EN
11 PSR Enable (Input) - A high to low transition on this pin will enable the PSR feedback circuit.
OVERFLOW
TEST
15 Overflow (Output, open drain) - Indicates a modulator overflow condition.
9
Test (Output) - This pin may toggle during normal operation and should be pulled low through a 47 k
resistor to GND in order to minimize noise.
www.DataSheet4U.com
6 DS650F1

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