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AD8220 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8220
Beschreibung JFET Input Instrumentation Amplifier
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 29 Seiten
AD8220 Datasheet, Funktion
JFET Input Instrumentation Amplifier with
Rail-to-Rail Output in MSOP Package
AD8220
FEATURES
Low input currents
10 pA maximum input bias current (B grade)
0.6 pA maximum input offset current (B grade)
High CMRR
100 dB CMRR (minimum), G = 10 (B grade)
80 dB CMRR (minimum) to 5 kHz, G = 1 (B grade)
Excellent ac specifications and low power
1.5 MHz bandwidth (G = 1)
14 nV/√Hz input noise (1 kHz)
Slew rate: 2 V/μs
750 μA quiescent supply current (maximum)
Versatile
MSOP package
Rail-to-rail output
Input voltage range to below negative supply rail
4 kV ESD protection
4.5 V to 36 V single supply
±2.25 V to ±18 V dual supply
Gain set with single resistor (G = 1 to 1000)
Qualified for automotive applications
APPLICATIONS
Medical instrumentation
Precision data acquisition
Transducer interfaces
GENERAL DESCRIPTION
The AD8220 is the first single-supply, JFET input instrumentation
amplifier available in an MSOP package. Designed to meet the
needs of high performance, portable instrumentation, the AD8220
has a minimum common-mode rejection ratio (CMRR) of 86 dB
at dc and a minimum CMRR of 80 dB at 5 kHz for G = 1. Maxi-
mum input bias current is 10 pA and typically remains below
300 pA over the entire industrial temperature range. Despite the
JFET inputs, the AD8220 typically has a noise corner of only 10 Hz.
With the proliferation of mixed-signal processing, the number
of power supplies required in each system has grown. The AD8220
is designed to alleviate this problem. The AD8220 can operate
on a ±18 V dual supply, as well as on a single +5 V supply. Its
rail-to-rail output stage maximizes dynamic range on the low
voltage supplies common in portable applications. Its ability to
run on a single 5 V supply eliminates the need to use higher
voltage, dual supplies. The AD8220 draws a maximum of 750 μA
of quiescent current, making it ideal for battery powered devices.
PIN CONFIGURATION
–IN 1
RG 2
RG 3
+IN 4
AD8220
8 +VS
7 VOUT
6 REF
5 –VS
TOP VIEW
(Not to Scale)
Figure 1.
10n
1n
100p
10p
1p
0.1p
IBIAS
IOS
–50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
Figure 2. Input Bias Current and Offset Current vs. Temperature
Gain is set from 1 to 1000 with a single resistor. Increasing the
gain increases the common-mode rejection. Measurements that
need higher CMRR when reading small signals benefit when
the AD8220 is set for large gains.
A reference pin allows the user to offset the output voltage. This
feature is useful when interfacing with analog-to-digital converters.
The AD8220 is available in an MSOP that takes roughly half the
board area of an SOIC. Performance for the A and B grade is
specified over the industrial temperature range of −40°C to +85°C,
and the W grade is specified over the automotive temperature
range of −40°C to +125°C.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2010 Analog Devices, Inc. All rights reserved.






AD8220 Datasheet, Funktion
AD8220
Parameter
POWER SUPPLY
Operating Range
Quiescent Current
Over Temperature
TEMPERATURE RANGE
For Specified
Performance
Test Conditions
TA
TOPR
TOPR
A Grade
Min Typ Max
±2.254
±18
750
850
B Grade
Min Typ Max
±2.254
±18
750
850
W Grade
Min Typ Max
±2.254
±18
750
1000
Unit
V
μA
μA
μA
−40
+85 −40
+85 −40
+125 °C
1 When the output sinks more than 4 mA, use a 47 pF capacitor in parallel with the load to prevent ringing. Otherwise, use a larger load, such as 10 kΩ.
2 Differential and common-mode input impedance can be calculated from the pin impedance: ZDIFF = 2(ZPIN); ZCM = ZPIN/2.
3 The AD8220 can operate up to a diode drop below the negative supply but the bias current increases sharply. The input voltage range reflects the maximum
allowable voltage where the input bias current is within the specification.
4 At this supply voltage, ensure that the input common-mode voltage is within the input voltage range specification.
VS + = 5 V, VS− = 0 V, VREF = 2.5 V, TA = 25°C, TOPR = −40°C to +85°C for A and B grades. TOPR = −40°C to +125°C for W grade, G = 1,
RL = 2 kΩ1, unless otherwise noted.
Table 2.
Parameter
COMMON-MODE REJECTION
RATIO (CMRR)
CMRR DC to 60 Hz with
1 kΩ Source Imbalance
G=1
G = 10
G = 100
G = 1000
CMRR at 5 kHz
G=1
G = 10
G = 100
G = 1000
NOISE
Voltage Noise, 1 kHz
Input Voltage Noise, eni
Output Voltage Noise, eno
RTI, 0.1 Hz to 10 Hz
G=1
G = 1000
Current Noise
VOLTAGE OFFSET
Input Offset, VOSI
Average TC
Output Offset, VOSO
Average TC
Offset RTI vs. Supply (PSR)
G=1
G = 10
G = 100
G = 1000
Test Conditions
TA for A, B grades,
TOPR for W grade
VCM = 0 to 2.5 V
VCM = 0 to 2.5 V
RTI noise = √(eni2 +
(eno/G)2), TA
VS = ±2.5 V
VIN+, VIN− = 0 V, VREF =
0V
VIN+, VIN− = 0 V, VREF =
0V
f = 1 kHz
VOS = VOSI + VOSO/G
TA
TOPR
TA
TOPR
TA for A, B grades,
TOPR for W grade
A Grade
Min Typ Max
B Grade
Min Typ Max
W Grade
Min Typ Max
Unit
78 86 77 dB
94 100 92 dB
94 100 92 dB
94 100 92 dB
74 80 72 dB
84 90 80 dB
84 90 80 dB
84 90 80 dB
14
14 17
14
nV/√Hz
90
90 100
90
nV/√Hz
5
0.8
1
−300
−10
−800
−10
5
0.8
1
+300
+10
+800
+10
−200
−5
−600
−5
5
0.8
1
+200
+5
+600
+5
−300
−10
−800
−10
μV p-p
μV p-p
fA/√Hz
+300
10
+800
+10
μV
μV/°C
μV
μV/°C
86 86 80 dB
96 100 92 dB
96 100 92 dB
96 100 92 dB
Rev. B | Page 5 of 28

6 Page









AD8220 pdf, datenblatt
XX
5µV/DIV
XX
XX
1s/DIV
XX
XXX (X)
Figure 11. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1)
XX
1µV/DIV
XX
XX
1s/DIV
XX
XXX (X)
Figure 12. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1000)
8
7
6
5
4
3
2
1
0
0.1 1
10 100 1k
TIME (s)
Figure 13. Change in Input Offset Voltage vs. Warmup Time
AD8220
150
130
110 GAIN = 100
90 GAIN = 10
GAIN = 1000
BANDWIDTH
LIMITED
70 GAIN = 1
50
30
10
1 10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 14. Positive PSRR vs. Frequency, RTI
1M
150
130
110 GAIN = 1000
90
GAIN = 1
70
GAIN = 10
50
GAIN = 100
30
10
1 10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 15. Negative PSRR vs. Frequency, RTI
1M
9
INPUT OFFSET
CURRENT ±15 INPUT OFFSET
CURRENT ±5
7
5 –15.1V
0.3
0.2
0.1
0
–0.1
3
–5.1V
–0.2
INPUT BIAS
INPUT BIAS
CURRENT ±15
–0.3
1 CURRENT ±5
–0.4
–1 –0.5
–16 –12 –8
–4
0
4
8 12 16
COMMON-MODE VOLTAGE (V)
Figure 16. Input Bias Current and Input Offset Current vs.
Common-Mode Voltage
Rev. B | Page 11 of 28

12 Page





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