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DS2045AB Schematic ( PDF Datasheet ) - Maxim Integrated Products

Teilenummer DS2045AB
Beschreibung Single-Piece 1M Nonvolatile SRAM
Hersteller Maxim Integrated Products
Logo Maxim Integrated Products Logo 




Gesamt 12 Seiten
DS2045AB Datasheet, Funktion
Rev 2; 1/05
heet4U.com DS2045Y/ABNSoinngvloel-aPtiieleceSR1AMMbGeneral Description
SThe DS2045 is a 1Mb reflowable nonvolatile (NV) SRAM,
tawhich consists of a static RAM (SRAM), an NV con-
atroller, and an internal rechargeable manganese lithium
.D(ML) battery. These components are encased in a sur-
face-mount module with a 256-ball BGA footprint.
wWhenever VCC is applied to the module, it recharges the
wML battery, powers the SRAM from the external power
wsource, and allows the contents of the SRAM to be mod-
ified. When VCC is powered down or out of tolerance,
mthe controller write-protects the SRAM’s contents and
powers the SRAM from the battery. Two versions of the
oDS2045 are available, which provide either a 5% or 10%
.cpower-monitoring trip point. The DS2045 also contains a
power-supply monitor output, RST, which can be used
as a CPU supervisor for a microprocessor.
UApplications
t4RAID Systems and Servers POS Terminals
Industrial Controllers
Data-Acquisition Systems
eGaming
heRouter/Switches
Fire Alarms
PLC
Features
Single-Piece, Reflowable, 27mm2 PBGA Package
Footprint
Internal ML Battery and Charger
Unconditionally Write-Protects SRAM when VCC
is Out-of-Tolerance
Automatically Switches to Battery Supply when
VCC Power Failures Occur
Internal Power-Supply Monitor Detects Power Fail
at 5% or 10% Below Nominal VCC (5V)
Reset Output can be used as a CPU Supervisor
for a Microprocessor
Industrial Temperature Range (-40°C to +85°C)
UL Recognized
Pin Configuration appears at end of data sheet.
Ordering Information
PART
SDS2045AB-70
taDS2045AB-100
DS2045Y-70
aDS2045Y-100
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
256 Ball 27mm2 BGA Module
256 Ball 27mm2 BGA Module
256 Ball 27mm2 BGA Module
256 Ball 27mm2 BGA Module
SPEED (ns)
70
100
70
100
SUPPLY TOLERANCE (%)
5
5
10
10
Typical Operating Circuit
.D(CE0)
P4.0
w (WR)
P3.6
(RD)
P3.7
ww om8051 AD0–AD7
.cMICROPROCESSOR
t4UP1.0–7
eP4.4
heP2.0–7
S(INT0)
taP3.2
8 BITS
8 BITS
8 BITS
CE
WE
OE
DS2045
DQ0–7 128k x 8
NV SRAM
A0–7
A16
A8–15
RST
.Da______________________________________________ Maxim Integrated Products 1
wwFor pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
w1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.






DS2045AB Datasheet, Funktion
DS2045Y/AB Single-Piece 1Mb
Nonvolatile SRAM
Power-Down/Power-Up Condition
VCC
VTP
~2.7V
CE,
WE
tF
tPD
tDR
SLEWS WITH
VCC
tR
tREC
tPU
VIH
BACKUP CURRENT
SUPPLIED FROM
LITHIUM BATTERY
RST
tRPD
VOL
tRPU
VOL
(SEE NOTES 1, 7.)
Note 1: RST is an open-drain output and cannot source current. An external pullup resistor should be connected to this pin to real-
ize a logic-high level.
Note 2: These parameters are sampled with a 5pF load and are not 100% tested.
Note 3: tWP is specified as the logical AND of CE and WE. tWP is measured from the latter of CE or WE going low to the earlier of
CE or WE going high.
Note 4: tWR1 and tDH1 are measured from WE going high.
Note 5: tWR2 and tDH2 are measured from CE going high.
Note 6: tDS is measured from the earlier of CE or WE going high.
Note 7: In a power-down condition, the voltage on any pin can not exceed the voltage on VCC.
Note 8: The expected tDR is defined as accumulative time in the absence of VCC starting from the time power is first applied by the
user. Minimum expected data-retention time is based on a maximum of two 230°C convection solder reflow exposures,
followed by a fully charged cell. Full charge occurs with the initial application of VCC for a minimum of 96 hours. This para-
meter is assured by component selection, process control, and design. It is not measured directly in production testing.
Note 9: WE is high for a read cycle.
Note 10: OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
Note 11: If the CE low transition occurs simultaneously with or latter than the WE low transition, the output buffers remain in a high-
impedance state during this period.
Note 12: If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain in a high-
impedance state during this period.
Note 13: If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain
in a high-impedance state during this period.
Note 14: DS2045 BGA modules are recognized by Underwriters Laboratory (UL) under file E99151.
6 _____________________________________________________________________

6 Page









DS2045AB pdf, datenblatt
DS2045Y/AB Single-Piece 1Mb
Nonvolatile SRAM
Pin Configuration
TOP VIEW
12 34
1 11
5 6 789 0 12
1 1 1 1 1112
3 4 5 6 7890
A GND
B N.C.
C A15
D A16
E RST
F VCC
G WE
H OE
J CE
K DQ7
L DQ6
M DQ5
N DQ4
P DQ3
R DQ2
T DQ1
U DQ0
V GND
W GND
Y GND
1 2 34
GND A
N.C. B
N.C. C
A14 D
A13 E
A12 F
A11 G
A10 H
A9 J
DS2045
A8 K
A7 L
A6 M
A5 N
A4 P
A3 R
A2 T
A1 U
A0 V
GND W
GND Y
5 6 7 8 9 1 1 1 1 1 1 1 1112
0 1 2 3 4 5 6 7890
Package Information
For the latest package outline information, go to
www.maxim-ic.com/DallasPackInfo.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
is a registered trademark of Dallas Semiconductor Corporation.

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