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ADC14L040 Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC14L040
Beschreibung 14-Bit 40 MSPS / 235mW A/D Converter
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 23 Seiten
ADC14L040 Datasheet, Funktion
June 2005
ADC14L040
14-Bit, 40 MSPS, 235 mW A/D Converter
General Description
The ADC14L040 is a low power monolithic CMOS analog-
to-digital converter capable of converting analog input sig-
nals into 14-bit digital words at 40 Megasamples per second
(MSPS). These converters use a differential, pipeline archi-
tecture with digital error correction and an on-chip sample-
and-hold circuit to minimize power consumption while pro-
viding excellent dynamic performance and a 150 MHz Full
Power Bandwidth. Operating on a single +3.3V power sup-
ply, the ADC14L040 achieves 11.9 effective bits at nyquist
and consumes just 235 mW at 40 MSPS . The Power Down
feature reduces power consumption to 15 mW.
The differential inputs provide a full scale differential input
swing equal to 2 times VREF with the possibility of a single-
ended input. Full use of the differential input is recom-
mended for optimum performance. Duty cycle stabilization
and output data format are selectable using a quad state
function pin. The output data can be set for offset binary or
two’s complement.
To ease interfacing to lower voltage systems, the digital
output driver power pins of the ADC14L040 can be con-
nected to a separate supply voltage in the range of 2.4V to
the analog supply voltage.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C. An evaluation board is available to ease the evalua-
tion process.
Features
n Single +3.3V supply operation
n Internal sample-and-hold
n Internal reference
n Outputs 2.4V to 3.6V compatible
n Duty Cycle Stabilizer
n Power down mode
Key Specifications
n Resolution
n DNL
n SNR (fIN = 10 MHz)
n SFDR (fIN = 10 MHz)
n Data Latency
n Power Consumption
n -- Operating
n -- Power Down Mode
Applications
n Medical Imaging
n Instrumentation
n Communications
n Digital Video
Connection Diagram
14 Bits
±0.5 LSB (typ)
74 dB (typ)
90 dB (typ)
7 Clock Cycles
235 mW (typ)
15 mW (typ)
www.datasheet4u.com© 2005 National Semiconductor Corporation
DS201465
20146501
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ADC14L040 Datasheet, Funktion
Converter Electrical Characteristics (Continued)
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =
+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 40 MHz, fIN = 20 MHz at -0.5dBFS, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle
Stabilizer On. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25˚C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
DYNAMIC CONVERTER CHARACTERISTICS
FPBW Full Power Bandwidth
0 dBFS Input, Output at −3 dB
150
MHz
SNR
SINAD
ENOB
Signal-to-Noise Ratio
Signal-to-Noise Ratio and
Distortion
Effective Number of Bits
THD
Total Harmonic Disortion
H2 Second Harmonic Distortion
H3 Third Harmonic Distortion
SFDR Spurious Free Dynamic Range
IMD Intermodulation Distortion
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 10 MHz
fIN = 20 MHz
fIN = 9.6 MHz and 10.2 MHz,
each = −6.5 dBFS
74
73.3
71.7
73.5
73 71.5
12
11.9
11.6
-86
-86 -77
-93
-91 -80
-90
-94 -80
90
90 80
−79
dBc
dBc
dBc
dBc
Bits
Bits
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
DC and Logic Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =
+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 40 MHz, fIN = 20 MHz, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle Stabilizer On.
Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25˚C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
CLK, PD DIGITAL INPUT CHARACTERISTICS
VIN(1)
Logical “1” Input Voltage
VD = 3.6V
VIN(0)
Logical “0” Input Voltage
VD = 3.0V
IIN(1)
Logical “1” Input Current
VIN = 3.3V
IIN(0)
Logical “0” Input Current
VIN = 0V
CIN Digital Input Capacitance
D0–D13 DIGITAL OUTPUT CHARACTERISTICS
2.0 V (min)
1.0 V (max)
10 µA
−10 µA
5 pF
VOUT(1)
VOUT(0)
+ISC
Logical “1” Output Voltage
Logical “0” Output Voltage
Output Short Circuit Source
Current
IOUT = −0.5 mA
VDR = 2.5V
VDR = 3V
IOUT = 1.6 mA, VDR = 3V
2.3 V (min)
2.7 V (min)
0.4 V (max)
VOUT = 0V
−10 mA
−ISC
Output Short Circuit Sink Current
COUT
Digital Output Capacitance
POWER SUPPLY CHARACTERISTICS
VOUT = VDR
10 mA
5 pF
IA Analog Supply Current
ID Digital Supply Current
IDR Digital Output Supply Current
Total Power Consumption
PD Pin = DGND, VREF = VA
PD Pin = VD
63 86 mA (max)
4.5 mA
PD Pin = DGND
8 12 mA (max)
PD Pin = VD , fCLK = 0
0 mA
PD Pin = DGND, CL = 5 pF (Note 14)
PD Pin = VD, fCLK = 0
4
0
mA
mA
PD Pin = DGND, CL = 5 pF (Note 15) 235 323 mW (max)
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ADC14L040 pdf, datenblatt
Typical Performance Characteristics, DNL, INL Unless otherwise specified, the following
specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR = +2.5V, PD = 0V, External VREF = +1.0V,
fCLK = 40 MHz, fIN = 0 MHz, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle Stabilizer On. Boldface limits apply for TJ = TMIN to
TMAX: all other limits TJ = 25˚C (Continued)
DNL vs. Temperature
INL vs. Temperature
20146567
DNL vs. VDR, VA = VD = 3.6V
INL vs. VDR, VA = VD = 3.6V
20146568
20146569
20146570
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