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GM71VS65163CL Schematic ( PDF Datasheet ) - Hynix Semiconductor

Teilenummer GM71VS65163CL
Beschreibung (GM71VS65163CL / GM71V65163C) 4M x 16-Bit MOS DRAM
Hersteller Hynix Semiconductor
Logo Hynix Semiconductor Logo 




Gesamt 10 Seiten
GM71VS65163CL Datasheet, Funktion
GM71V65163C
GM71VS65163CL
4,196,304 WORDS x 16 BIT
MOS DYNAMIC RAM
Description
Pin Configuration
The GM71V(S)65163C/CL is the new generation
dynamic RAM organized 4,196,304 words by 16
bits. The GM71V(S)65163C/CL utilizes advanced
CMOS Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)65163C/CL offers Extended Data
Out(EDO) Mode as a high speed access mode.
50 SOJ / TSOP-II
VCC 1
IO0 2
IO1 3
IO2 4
IO3
VCC
IO4
IO5
5
6
7
8
IO6 9
IO7 10
NC 11
VCC 12
Features
/WE 13
/RAS 14
* 4,196,304 Words x 16 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
NC 15
NC 16
NC 17
NC 18
A0 19
tRAC tAA tCAC tRC
tHPC
A1 20
A2 21
GM71V(S)65163C/CL-5 50 25 13 90 20
GM71V(S)65163C/CL-6 60 30 15 110 25
A3 22
A4 23
A5 24
VCC 25
*Power dissipation
- Active : 540mW/504mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
4096 cycles/64 ms (GM71V65163C)
4096 cycles/128ms (GM71VS65163CL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64 ms (GM71V65163C)
m4096 cycles/128 ms (GM71VS65163CL)( L-Version )
o*4 variations of refresh
.c-RAS-only refresh
u-CAS-before-RAS refresh
t4-Hidden refresh
-Self refresh (L-Version)
ee*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
h*Battery Back Up Operation ( L-Version )
www.datasRev 0.1 / Apr’01
(Top View)
50 VSS
49 IO15
48 IO14
47 IO13
46 IO12
45 VSS
44 IO11
43 IO10
42 IO9
41 IO8
40 NC
39 VSS
38 /LCAS
37 /UCAS
36 /OE
35 NC
34 NC
33 NC
32 A11
31 A10
30 A9
29 A8
28 A7
27 A6
26 VSS






GM71VS65163CL Datasheet, Funktion
GM71V65163C
GM71VS65163CL
Write Cycles
Symbol
Parameter
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Min Max Min
Max
tWCS
tWCH
Write Command Set-up Time
Write Command Hold Time
0-0
-
8 - 10 -
tWP Write Command Pulse Width
8 - 10
tRWL Write Command to RAS Lead Time
13
-
15
-
-
tCWL Write Command to CAS Lead Time
8
- 10
-
tDS Data-in Set-up Time
0-0
-
tDH Data-in Hold Time
8 - 10 -
Unit Notes
ns 14,21
ns 21
ns
ns
ns 23
ns 15,23
ns 15,23
Read-Modify-Write Cycles
Symbol
Parameter
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Min
Max Min
Max
Unit Notes
tRWC Read-Modify-Write Cycle Time
116
-
140
- ns
tRWD RAS to WE Delay Time
67 - 79 - ns 14
tCWD CAS to WE Delay Time
30 - 34 - ns 14
tAWD Column Address to WE Delay Time 42 - 49 - ns 14
tOEH OE Hold Time from WE
13 - 15 - ns
Refresh Cycles
Symbol
Parameter
tCSR
tCHR
tWRP
tWRH
tRPC
CAS Set-up Time
(CAS-before-RAS Refresh Cycle)
CAS Hold Time
(CAS-before-RAS Refresh Cycle)
WE setup time
(CAS-before-RAS Refresh Cycle)
WE hold time
(CAS-before-RAS Refresh Cycle)
RAS Precharge to CAS Hold Time
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Unit Notes
Min Max Min
Max
5- 5
- ns 21
8 - 10 - ns 22
0- 0
- ns
8 - 10 - ns
5- 5
- ns 21
Rev 0.1 / Apr’01

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