EPM570 Datasheet PDF - Altera Corporation
| Part Number | EPM570 | |
| Description | (EPMxxxx) JTAG & In-System Programmability | |
| Manufacturers | Altera Corporation | |
| Logo |  |
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There is a preview and EPM570 download ( pdf file ) link at the bottom of this page. Total 30 Pages | ||
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Section I. MAX II Device
Family Data Sheet
This section provides designers with the data sheet specifications for
MAX® II devices. The chapters contain feature definitions of the internal
architecture, Joint Test Action Group (JTAG) and in-system
programmability (ISP) information, DC operating conditions, AC timing
parameters, and ordering information for MAX II devices.
This section includes the following chapters:
■ Chapter 1. Introduction
■ Chapter 2. MAX II Architecture
■ Chapter 3. JTAG & In-System Programmability
■ Chapter 4. Hot Socketing & Power-On Reset in MAX II Devices
■ Chapter 5. DC & Switching Characteristics
■ Chapter 6. Reference & Ordering Information
Altera Corporation
Section I–1
Preliminary
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Introduction
1 For more information on equivalent macrocells, refer to the
MAX II Logic Element to Macrocell Conversion Methodology white
paper.
MAX II devices are available in three speed grades: -3, -4, -5 with -3 being
the fastest. These speed grades represent overall relative performance,
not any specific timing parameter. For propagation delay timing numbers
within each speed grade and density, see the chapter on DC & Switching
Characteristics. Table 1–2 shows MAX II device speed-grade offerings.
Table 1–2. MAX II Speed Grades
Device
EPM240
EPM570
EPM1270
EPM2210
-3
v
v
v
v
Speed Grade
-4
v
v
v
v
-5
v
v
v
v
MAX II devices are available in space-saving FineLine BGA® and thin
quad flat pack (TQFP) packages (see Tables 1–3 and 1–4). MAX II devices
support vertical migration within the same package (e.g., you can migrate
between the EPM570, EPM1270, and EPM2210 devices in the
256-pin FineLine BGA package). Vertical migration means that you can
migrate to devices whose dedicated pins and JTAG pins are the same and
power pins are subsets or supersets for a given package across device
densities. The largest density in any package has the highest number of
power pins; you must layout for the largest planned density in a package
to provide the necessary power pins for migration. For I/O pin migration
across densities, cross reference the available I/O pins using the device
pin-outs for all planned densities of a given package type to identify
which I/O pins can be migrated. The Quartus® II software can
automatically cross reference and place all pins for you when given a
device migration list.
Table 1–3. MAX II Packages & User I/O Pins
Device
EPM240
EPM570
EPM1270
EPM2210
100-Pin TQFP
80
76
144-Pin TQFP
116
116
256-Pin FineLine BGA 324-Pin FineLine BGA
160
212
204 272
Altera Corporation
December 2004
Core Version a.b.c variable
1–3
MAX II Device Handbook, Volume 1
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for EPM570 electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ EPM570.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| EPM570 | The function is MAX II Device Family. Altera |  |
| EPM570 | The function is (EPMxxxx) JTAG & In-System Programmability. Altera Corporation | |
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