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PDF DM74LS374 Data sheet ( Hoja de datos )
| Número de pieza | DM74LS374 | |
| Descripción | (DM74LS373 / DM74LS374) TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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May 1992
DM54LS373 DM74LS373
DM54LS374 DM74LS374
TRI-STATE Octal D-Type Transparent
Latches and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole TRI-STATE outputs
designed specifically for driving highly-capacitive or relative-
ly low-impedance loads The high-impedance state and in-
creased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components They are particularly attractive
for implementing buffer registers I O ports bidirectional
bus drivers and working registers
(Continued)
Features
Y Choice of 8 latches or 8 D-type flip-flops in a single
package
Y TRI-STATE bus-driving outputs
Y Full parallel-access for loading
Y Buffered control inputs
Y P-N-P inputs reduce D-C loading on data lines
Connection Diagrams
Dual-In-Line Packages
’LS373
Order Number
DM54LS373J
DM54LS373W
DM74LS373N or
DM74LS373WM
See NS Package Number
J20A M20B N20A or
W20A
’LS374
TL F 6431 – 1
Order Number
DM54LS374J
DM54LS374W
DM74LS374WM or
DM74LS374N
See NS Package Number
J20A M20B N20A or
W20A
TRI-STATE is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL F 6431
TL F 6431 – 2
RRD-B30M105 Printed in U S A
1 page  
’LS374 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
VI
VOH
VOL
II
IIH
IIL
IOZH
IOZL
IOS
ICC
Parameter
Input Clamp Voltage
High Level Output Voltage
Low Level Output Voltage
Input Current Max
Input Voltage
High Level Input Current
Low Level Input Current
Off-State Output
Current with High
Level Output
Voltage Applied
Off-State Output
Current with Low
Level Output
Voltage Applied
Short Circuit
Output Current
Supply Current
Conditions
VCC e Min II e b18 mA
VCC e Min
IOH e Max
VIL e Max
VIH e Min
VCC e Min
IOL e Max
VIL e Max
VIH e Min
IOL e 12 mA
VCC e Min
VCC e Max VI e 7V
VCC e Max VI e 2 7V
VCC e Max VI e 0 4V
VCC e Max VO e 2 7V
VIH e Min VIL e Max
VCC e Max VO e 0 4V
VIH e Min VIL e Max
VCC e Max
(Note 2)
VCC e Max Dn e GND OC e 4 5V
DM54
DM74
DM54
DM74
DM74
DM54
DM74
Min
24
24
b50
b50
Typ
(Note 1)
34
31
0 25
0 35
0 25
27
Max
b1 5
04
05
04
01
20
b0 4
20
b20
b225
b225
45
Units
V
V
V
mA
mA
mA
mA
mA
mA
mA
’LS374 Switching Characteristics at VCC e 5V and TA e 25 C
(See Section 1 for Test Waveforms and Output Load)
Symbol
fMAX
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Maximum Clock Frequency
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Output Enable Time
to High Level Output
Output Enable Time
to Low Level Output
Output Disable Time
from High Level Output (Note 3)
Output Disable Time
from Low Level Output (Note 3)
RL e 667X
CL e 45 pF
CL e 150 pF
Min Max Min Max
35 20
28 32
28 38
28 44
28 44
20
25
Note 1 All typicals are at VCC e 5V TA e 25 C
Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3 CL e 5 pF
Units
MHz
ns
ns
ns
ns
ns
ns
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet DM74LS374.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| DM74LS373 | (DM74LS373 / DM74LS374) TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | National Semiconductor |
| DM74LS373 | (DM74LS373 / DM74LS374) 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops |  Fairchild Semiconductor |
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| DM74LS374 | (DM74LS373 / DM74LS374) TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | National Semiconductor |
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