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D1723GF Schematic ( PDF Datasheet ) - NEC

Teilenummer D1723GF
Beschreibung UPD1723GF
Hersteller NEC
Logo NEC Logo 




Gesamt 30 Seiten
D1723GF Datasheet, Funktion
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD1723GF-013, µPD1723GF-213
PLL FREQUENCY SYNTHESIZER AND CONTROLLER
FOR FM/MW/LF TUNER (CAR AUDIO)
The µPD1723GF-013 and µPD1723GF-213 are CMOS LSI developed for worldwide PLL frequency synthesizer
FM/MW/LW tuner use.
Their package is a 64-pin QFP. On-chip PLL frequency synthesizer, controller, 200 MHz prescaler, LCD driver,
and IF counter allow the construction of a compact FM/MW/LW tuner with a high-performance clock for high-
end car stereo and home stereo sets.
www.DataSheet4U.com
FEATURES
Worldwide FM/MW banks and European LW band can be received.
Abundant tuning functions, including manual tuning, autotuning (seek, scan), and preset memory scan
Six buttons, independent preset memories for 18 FM stations (FM1, FM2, FM3; 6 stations each), 12 MW
stations (MW1, MW2; 6 stations each), 6 LW stations, and VF band
FM: 3, MW: 2, LW: 1, VF: 1 last channel memories
VF broadcast station (traffic information) autotuning (SK signal search) and DK standby function
MONO (MONORAL) and LOC (LOCAL/DX) control output and display
“ST” (STEREO) display
MTL (METAL), NR1 (NOISE REDUCTION), NR2, and AMS (AUTO MUSIC SEARCH) control output and display
Auto preset memory function
“ ” (Compact Disk) display
LOUD (LOUDNESS) control output and display
12 hour and 24 hour clock display function (no clock display also possible)
Single 5 V ±10 % power supply
On-chip prescaler (200 MHz max. Vin = 0.3 VP-P), IF counter, LCD driver (1/2 duty, 1/2 bias drive, frame frequency
(100 Hz))
ORDERING INFORMATION
Order Code
µPD1723GF-011-3BE
µPD1723GF-211-3KE
Package
64-pin plastic QFP (14x20)
64-pin plastic QFP (14x20)
Quality Grade
Standard
Standard
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.
Document No. IC–2772
(O.D.No. IC–8187)
Date Published January 1991 P
Printed in Japan
© 1991






D1723GF Datasheet, Funktion
µPD1723GF-013, µPD1723GF-213
PIN No.
6
7
www.DataSheet4U.com
SYMBOL
FM
CE
PIN NAME
FM local
oscillation
input
Chip enable
DESCRIPTION
OUTPUT
TYPE
The FM local oscillation output (VCO output) is input
to this pin.
When the radio is turned on and the FM band is
received, this pin becomes active. Otherwise, it is
pulled down internally.
The input amplitude is 0.3 VP-P MIN.
Since there is an on-chip AC amplifier, block the DC
component of the input signal with a capacitor.
Input
Device select signal input pin.
When the device is operated normally (radio, tape, CD,
clock display, etc.), High level is input and when the
device is not used, Low level is input.
However, High and Low levels of 134 µs or less are not
accepted.
When this pin is Low level, the radio, tape, CD, and
display are turned off and the device enters the data
hold state.
At this time, data hold at low consumption current (400
nA or less) is possible by setting the NOCLK switch of
the diode matrix to be described later to 1 (shorted by
diode, no-clock mode).
Input
Radio mode AGC (AUTOMATIC GAIN CONTROL) cut
signal output pin.
During autotuning, the High level shown below is
output.
RDMUTE
Pin
AGC cut
9
AGCC
output
Œ
50 ms 40 ms
AGCC Pin
Ž
250 to 375 ms
CMOS
pushpull
Key ON
Broadcast Station
ΠKey ON Chattering Wait
 Premuting
Ž Postmuting
6

6 Page









D1723GF pdf, datenblatt
µPD1723GF-013, µPD1723GF-213
PIN No.
21
22
23
www.DataSheet4U.com
24
25
26
58
SYMBOL
MTL
NR1
POWER
XO
XI
GND2
GND1
PIN NAME
DESCRIPTION
OUTPUT
TYPE
Tape mode metal signal output pin.
Its output is inverted each time the MTL key
Metal output
and METAL function key (selected by diode matrix) is
pressed. When the METAL state is selected with these
keys, the LCD panel “MTL” display lights and high
CMOS
pushpull
level is output from this pin.
When the power is turned on, this pin becomes low.
Noise
reduction
output
Tape mode noise reduction (NR) signal output pin.
When NR1 is selected by the NR key or
NOISE REDUCTION function key (selected by diode
matrix), the LCD panel “NR1” display lights and high
CMOS
pushpull
level is output from this pin.
Power
output
When the CE pin is high level, the output of this pin is
inverted each time the POWER key is pressed.
When the power is turned on, low level is output.
CMOS
This pin can be used to turn the set power on and off, pushpull
etc.
See 6 “Application Circuits”.
Crystal
oscillator
Crystal oscillator connection pin. It connects to a 4.5
MHz crystal oscillator.
When the clock function is used, the accuracy of the
clock is effected by the oscillation frequency accuracy
only.
Adjust the oscillation frequency while observing the
CMOS
(XO)
Input (XI)
LCD oscillation waveform and PLL local oscillation
frequency.
Ground
Device ground pins.
Remarks Always connect pins 26 and 58 to the same
potential.
GND1 (pin 58) is analog system ground and
GND2 is digital system ground.
12

12 Page





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