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PDF P75NF Data sheet ( Hoja de datos )
| Número de pieza | P75NF | |
| Descripción | STP75NF | |
| Fabricantes | ST Microelectronics | |
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STB75NF75
STP75NF75 STP75NF75FP
N-CHANNEL 75V - 0.0095 Ω - 80A TO-220/TO-220FP/D²PAK
STripFET™ II POWER MOSFET
TYPE
VDSS
RDS(on)
ID
STB75NF75
STP75NF75
STP75NF75FP
75 V
75 V
75 V
<0.011 Ω
<0.011 Ω
<0.011 Ω
80 A
80 A
80 A(*)
s TYPICAL RDS(on) = 0.0095 Ω
s EXCEPTIONAL dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s SURFACE-MOUNTING D2PAK (TO-263)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4”)
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET™ process has specifically been de-
signed to minimize input capacitance and gate charge. It
is therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended for
any applications with low gate drive requirements.
APPLICATIONS
s SOLENOID AND RELAY DRIVERS
s DC MOTOR CONTROL
s DC-DC CONVERTERS
s AUTOMOTIVE ENVIRONMENT
3
2
1
TO-220FP
3
1
D2PAK
TO-263
(Suffix “T4”)
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM(•) Drain Current (pulsed)
Ptot Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
EAS (2) Single Pulse Avalanche Energy
VISO
Insulation Withstand Voltage (DC)
Tstg Storage Temperature
Tj Operating Junction Temperature
(•) Pulse width limited by safe operating area.
(*) Refer to SOA for the max allowable current values on FP-type
due to Rth value
STB75NF75
STP75NF75
80
70
320
300
2.0
------
Value
STP75NF75FP
75
75
± 20
80(*)
70(*)
320(*)
45
0.3
12
700
2000
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
V
-55 to 175
°C
(1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
(2) Starting Tj = 25 oC, ID = 40A, VDD= 37.5V
June 2003
NEW DATASHEET ACCORDING TO PCN DSG20023123 MARKING: P75NF75 @
1/11
1 page  
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Gate Charge vs Gate-source Voltage
STB75NF75 STP75NF75 STP75NF75FP
Capacitance Variations
Normalized Gate Threshold Voltage vs Temperature
Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized Breakdown Voltage Temperature
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STB75NF75 STP75NF75 STP75NF75FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
® 2002 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
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11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet P75NF.PDF ] | |
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