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PDF DS1667 Data sheet ( Hoja de datos )
| Número de pieza | DS1667 | |
| Descripción | Digital Resistor with OP AMP | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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DS1667
Digital Resistor with OP AMP
www.dalsemi.com
FEATURES
Two digitally controlled 256-position
potentiometers
Serial port provides means for setting and
reading both potentiometers
Resistors can be connected in series to
provide additional resolution
Default wiper position on power up is 50%
Resistive elements are temperature-
compensated to +20% end to end
Two high-gain, wide bandwidth operational
amplifiers
Low power CMOS design
Applications include analog-to-digital and
digital-to-analog converters, variable
oscillators, and variable gain amplifiers
20-pin DIP package or optional 20-pin SOIC
surface mount package
Operating temperature range
- Commercial: 0°C to 70°C
Resistance values:
RESOLUTION -3 dB POINT
DS1667-10: 10k 39 ohms 1.1 MHz
DS1667-50: 50k 195 ohms 200 kHz
DS1667-100: 100k 390 ohms 100 kHz
PIN ASSIGNMENT
NINV0
INV0
VB
W1
H1
L1
RST
CLK
OUT1
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 OUT0
18 SOUT
17 W0
16 H0
15 L0
14 COUT
13 DQ
12 INVI
11 NINVI
20-Pin DIP (300-mil) and 20-Pin SOIC
See Mech. Drawings Section
PIN DESCRIPTION
VCC
GND
- +5-Volt Supply
- Ground
L0, L1
- Low End of Resistor
H0, H1
- High End of Resistor
W0, W1
- Wiper End of Resistor
VB - Substrate Bias and OP
AMP Negative Supply
SOUT
- Wiper for Stacked
Configuration
RST - Serial Port Reset Input
DQ - Serial Port Input/Output
CLK
- Serial Port Clock Input
COUT
- Cascade Serial Port
Output
NINV0, NINVI
- Noninverting OP AMP
Input
INV0, INVI
- Inverting OP AMP Input
OUT0, OUT1
- OP AMP Outputs
DESCRIPTION
The DS1667 is a dual-solid state potentiometer that is adjustable by digitally selected resistive elements.
Each potentiometer is composed of 256 resistive elements. Between each resistive section of each
potentiometer are tap points accessible to the wiper. The position of the wiper on the resistive array is set
by an 8-bit register that controls which tap point is connected to the wiper output. Each 8-bit register can
be read or written by sending or receiving data bits over a 3-wire serial port. In addition, the resistors can
be stacked such that a single potentiometer of 512 sections results. When two separate potentiometers are
used, the resolution of the DS1667 is equal to the resistance value divided by 256. When the
potentiometers are stacked end to end, the resistance value is doubled while the resolution remains the
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032000
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DS1667
DS1667 LINEARITY MEASUREMENTS
An important specification for the DS1667 is linearity, that is, for a given digital input, how close the
analog output is to that which is expected.
The test circuit used to measure the linearity of the DS1667 is shown in Figure 5. Note that to get an
accurate output voltage it is necessary to assure that the output current is 0, in order to negate the effects
of wiper impedance RW, which is typically 400 ohms. For any given setting N for the pot, the expected
voltage output at SOUT is:
VO = -5 + [10 X (N/256)] (in volts)
Absolute linearity is a comparison of the actual measured output voltage versus the expected value given
by the equation above and is given in terms of an LSB, which is the change in expected output when the
digital input is incremented by 1. In this case the LSB is 10/256 or 0.03906 volts. The equation for the
absolute linearity of the DS1667 is:
VO (actual) - VO (expected) = AL (in LSBs)
LSB
The specification for absolute linearity of the DS1667 is + 1 LSB typical.
Relative linearity is a comparison of the difference of actual output voltages of two successive taps and
the difference of the expected output voltages of two successive taps. The expected difference of output
voltages is 1 LSB or 0.03906V for the measurement system of Figure 5. Relative linearity is expressed in
terms of an LSB and is given by the equation:
∆VO (actual) - LSB = RL
LSB
The specification for relative linearity of the DS1667 is ± 0.5 LSB typical.
Figure 6 is a plot of absolute linearity (AL) and relative linearity (RL) versus wiper setting for a typical
DS1667 at 25°C.
DESCRIPTION AND OPERATION - OP AMP SECTION
The DS1667 contains two operational amplifiers which are ideal for operation from a single 5V supply
and ground or from +5V supplies (see Figure 1). An internal resistor divider defines the internal reference
of the op amp to be halfway between the power supplies, i.e.:
VDD + VB
2
For optimal performance, choose analog ground to be this value. The operational amplifiers feature rail to
rail output swing in addition to an input common mode range that includes the positive rail. Performance
features include broad band noise immunity as well as voltage gain into realistic loads specified at both
600 ohms and 2k ohms. High voltage gain is produced with low input offset voltage and low offset
voltage drift. Current consumption is less than 1.9 mA per amplifier and the device is virtually immune to
latchup.
5 of 10
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| PDF Descargar | [ Datasheet DS1667.PDF ] | |
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