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G766 Schematic ( PDF Datasheet ) - ETC

Teilenummer G766
Beschreibung Remote Temperature Sensor with SMBus Serial Interface
Hersteller ETC
Logo ETC Logo 




Gesamt 13 Seiten
G766 Datasheet, Funktion
Global Mixed-mode Technology Inc.
G766
Remote Temperature Sensor with SMBus Serial
Interface
Features
„Single Channel: Measures Remote CPU Tem-
perature
„No Calibration Required
„SMBus 2-Wire Serial Interface
„Programmable Under/Overtemperature Alarms
„Supports SMBus Alert Response
„Accuracy:
±3°C (+60°C to +100°C, remote)
„3µA (typ) Standby Supply Current
„300µA (max) Supply Current in Auto- Convert
Mode
„+3V to +5.5V Supply Range
„Small, 10-Pin MSOP Package
Applications
Desktop and Notebook
Computers
Smart Battery Packs
LAN Servers
Industrial Controls
Central Office
Telecom Equipment
Test and Measurement
Multi-Chip Modules
Pin Configuration
General Description
The G766 is a precise digital thermometer that reports
the temperature of a remote sensor. The remote sen-
sor is a diode-connected transistor typically a low-cost,
easily mounted 2N3904 NPN type-that replace con-
ventional thermistors or thermocouples. Remote ac-
curacy is ±3°C for multiple transistor manufacturers,
with no calibration needed. The G766 can also meas-
ure the die temperature of other ICs, such as micro-
processors, that contain an on-chip, diode-connected
transistor.
The 2-wire serial interface accepts standard System
Management Bus (SMBusTM) Write Byte, Read Byte,
Send Byte, and Receive Byte commands to program
the alarm thresholds and to read temperature data.
The data format is 7 bits plus sign, with each bit cor-
responding to 1°C, in twos-complement format. Meas-
urements can be done automatically and autono-
mously, with the conversion rate programmed by the
user or programmed to operate in a single-shot mode.
The adjustable rate allows the user to control the sup-
ply-current drain.
The G766 is available in a small, 10-pin MSOP sur-
face-mount package.
Ordering Information
PART*
G766
TEMP. RANGE
-55°C to +125°C
PIN PACKAGE
10-MSOP
Typical Operating Circuit
ADD0 1
ADD1 2
GND 3
DXN 4
DXP 5
G766
10 ALERT
9 SMBDATA
8 SMBCLK
7 STBY
6 Vcc
2N3904
10 Pin MSOP
0.1 µF
3V TO 5.5V
200Ω
Vcc STBY
DXP
DXN
2200pF
SMBCLK
SMBDATA
ALERT
ADD0 ADD1 GND
10k EACH
CLOCK
DATA
INTERRUPT
TO µC
Ver 1.0
Dec 11, 2001
TEL: 886-3-5788833
http://www.gmt.com.tw
1






G766 Datasheet, Funktion
Global Mixed-mode Technology Inc.
G766
Table 1. Remote-Sensor Transistor Manufacturers
MANUFACTURER
MODEL NUMBER
Philips
PMBS3904
Motorola(USA)
MMBT3904
National Semiconductor(USA)
MMBT3904
Note:Transistors must be diode-connected (base
shorted to collector).
ADC Noise Filtering
The ADC is an integrating type with inherently good
noise rejection, especially of low-frequency signals
such as 60Hz/120Hz power-supply hum. Micropower
operation places constraints on high-frequency noise
rejection; therefore, careful PC board layout and prop-
er external noise filtering are required for high-
accuracy remote measurements in electrically noisy
environments.
High-frequency EMI is best filtered at DXP and DXN
with an external 2200pF capacitor. This value can be
increased to about 3300pF(max), including cable ca-
pacitance. Higher capacitance than 3300pF introduces
errors due to the rise time of the switched current
source.
Nearly all noise sources tested cause the ADC meas-
urements to be higher than the actual temperature,
typically by +1°C to 10°C, depending on the frequency
and amplitude(see Typical Operating Characteristics).
PC Board Layout
Place the G766 as close as practical to the remote
diode. In a noisy environment, such as a computer
motherboard, this distance can be 4 in. to 8 in. (typical)
or more as long as the worst noise sources (such as
CRTs, clock generators, memory buses, and ISA/PCI
buses) are avoided.
Do not route the DXP-DXN lines next to the deflection
coils of a CRT. Also, do not route the traces across a
fast memory bus, which can easily introduce +30°C
error, even with good filtering, Otherwise, most noise
sources are fairly benign.
Route the DXP and DXN traces in parallel and in close
proximity to each other, away from any high-voltage
traces such as +12VDC. Leakage currents from PC
board contamination must be dealt with carefully,
since a 20Mleakage path from DXP to ground
causes about +1°C error.
Connect guard traces to GND on either side of the
DXP-DXN traces (Figure 2). With guard traces in place,
routing near high-voltage traces is no longer an issue.
Route through as few vias and crossunders as
possible to minimize copper/solder thermocouple ef-
fects.
When introducing a thermocouple, make sure that
both the DXP and the DXN paths have matching
thermocouples. In general, PC board-induced ther-
mocouples are not a serious problem, A copper-solder
thermocouple exhibits 3µV/°C, and it takes about
200µV of voltage error at DXP-DXN to cause a +1°C
measurement error. So, most parasitic thermocouple
errors are swamped out.
Use wide traces. Narrow ones are more inductive and
tend to pick up radiated noise. The 10 mil widths and
spacing recommended on Figure 2 aren’t absolutely
necessary (as they offer only a minor improvement in
leakage and noise), but try to use them where practi-
cal.
Keep in mind that copper can’t be used as an EMI
shield, and only ferrous materials such as steel work
will. Placing a copper ground plane between the
DXP-DXN traces and traces carrying high-frequency
noise signals does not help reduce EMI.
PC Board Layout Checklist
„Place the G766 close to a remote diode.
„Keep traces away from high voltages (+12V bus).
„Keep traces away from fast data buses and CRTs.
„Use recommended trace widths and spacing.
„Place a ground plane under the traces
„Use guard traces flanking DXP and DXN and con-
necting to GND.
„Place the noise filter and the 0.1µF Vcc bypass
capacitors close to the G766.
„Add a 200resistor in series with Vcc for best
noise filtering (see Typical Operating Circuit).
Ver 1.0
Dec 11, 2001
TEL: 886-3-5788833
http://www.gmt.com.tw
6

6 Page









G766 pdf, datenblatt
Global Mixed-mode Technology Inc.
G766
SMBCLK
AB
C D EF
tLOW tHIGH
G
H IJ
K LM
SMBDATA
tSU:STA tHD:STA
tSU:DAT
tHD:DAT
Figure 4. SMBus Write Timing Diagram
tSU:STO tBUF
A = start condition
B = MSB of address clocked into slave
C = LSB of address clocked into slave
D = R/W bit clocked into slave
E = slave pulls SMBData line low
F = acknowledge bit clocked into master
G = MSB of data clocked into slave
H = LSB of data clocked into slave
I = slave pulls SMBDATA line low
J = acknowledge clocked into master
K = acknowledge clocked pulse
L = stop condition data executed by slave
M = new start condition
SMBCLK
AB
C D EF
tLOW tHIGH
G
HI
JK
SMBDATA
tSU:STA tHD:STA
tSU:DAT
tSU:STO
tBUF
Figure 5. SMBus Read Timing Diagram
A = start condition
B = MSB of address clocked into slave
C = LSB of address clocked into slave
D = R/ W bit clocked into slave
E = slave pulls SMBDATA line low
F =acknowledge bit clocked into master
G = MSB of data clocked into master
H = LSB of data clocked into master
I = acknowledge clocked pulse
J = stop condition
K= new start condition
Ver 1.0
Dec 11, 2001
TEL: 886-3-5788833
http://www.gmt.com.tw
12

12 Page





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