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CDB4272 Schematic ( PDF Datasheet ) - Cirrus Logic

Teilenummer CDB4272
Beschreibung 24-Bit / 192 kHz Stereo Audio CODEC
Hersteller Cirrus Logic
Logo Cirrus Logic Logo 




Gesamt 30 Seiten
CDB4272 Datasheet, Funktion
CS4272
24-Bit, 192 kHz Stereo Audio CODEC
D/A Features
! High Performance
– 114 dB Dynamic Range
– -100 dB THD+N
! Up to 192 kHz Sampling Rates
! Differential Analog Architecture
! Volume Control with Soft Ramp
– 1 dB Step Size
– Zero Crossing Click-free Transitions
! Selectable Digital Filters
– Fast and Slow Roll Off
! ATAPI Mixing Functions
! Selectable Serial Audio Interface Formats
– Left Justified up to 24-bit
– I2S up to 24-bit
– Right Justified 16-, 18-, 20-, and 24-Bit
! Control Output for External Muting
! Selectable 50/15 µs De-emphasis
A/D Features
! High Performance
– 114 dB Dynamic Range
– -100 dB THD+N
! Up to 192 kHz Sampling Rates
! Differential Analog Architecture
! Multi-bit Delta Sigma Conversion
! High-pass Filter or DC Offset Calibration
! Low-Latency Digital Anti-alias Filtering
! Automatic Dithering of 16-bit Data
! Selectable Serial Audio Interface Formats
– Left Justified up to 24-bit
– I2S up to 24-bit
System Features
! Direct Interface with 5V to 2.5V Logic Levels
! Internal Digital Loopback
! On-chip Oscillator
! Stand-Alone or Control Port Functionality
2.5 V to 5 V
3.3 V to 5 V
5V
Hardware or
I2C/SPI
Control Data
Reset
Serial
Audio
Input
Serial
Audio
Output
Register / Hardware
Configuration
Volume
Control
Volume
Control
Internal Voltage
Reference
Internal
Oscillator
External
Mute Control
Selectable
Interpolation
Filter
Selectable
Interpolation
Filter
∆Σ Modulator
∆Σ Modulator
Switched Capacitor
DAC and Filter
Switched Capacitor
DAC and Filter
High Pass Filter &
DC Offset Calibration
High Pass Filter &
DC Offset Calibration
Low-Latency
Anti-Alias Filter
Low-Latency
Anti-Alias Filter
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
Left and
Right Mute
Controls
Left
Differential
Output
Right
Differential
Output
Left
Differential
Input
Right
Differential
Input
Cirrus Logic, Inc.
www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
AUGUST '05
DS593F1






CDB4272 Datasheet, Funktion
CS4272
Pin Name
XTO
XTI
MCLK
LRCK
SCLK
SDOUT
SDIN
DGND
VD
VL
SCL/CCLK
SDA/CDIN
AD0/CS
RST
VCOM
AINA-
AINA+
AINB+
AINB-
VA
AGND
FILT+
AMUTEC
AOUTA-
AOUTA+
AOUTB+
AOUTB-
BMUTEC
# Pin Description
1,2
Crystal Connections (Input/Output) - I/O pins for an external crystal which may be used to generate
MCLK. See “Crystal Applications (XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
3
Master Clock (Input/Output) -Clock source for the delta-sigma modulators. See “Crystal Applications
(XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
4
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
5 Serial Clock (Input/Output) - Serial clock for the serial audio interface.
6 Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
7 Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
8 Digital Ground (Input) - Ground reference for the internal digital section.
9 Digital Power (Input) - Positive power for the internal digital section.
10 Logic Power (Input) - Positive power for the digital input/output interface.
11 Serial Control Port Clock (Input) - Serial clock for the serial control port.
12
Serial Control Data (Input/Output) - SDA is a data I/O in I²C mode. CDIN is the input data line for the
control port interface in SPI mode.
13
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode; CS
is the chip select signal for SPI format.
14 Reset (Input) - The device enters a low power mode when this pin is driven low.
15 Common Mode Voltage (Output) - Filter connection for internal common mode voltage.
16,
17, Differential Analog Input (Input) - The full scale differential input signals are presented to the delta-
18, sigma modulators. The full scale level is specified in the ADC Analog Characteristics specification table.
19
20 Analog Power (Input) - Positive power for the internal analog section.
21 Analog Ground (Input) - Ground reference for the internal analog section.
22 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
23
Channel A Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.
24,
25, Differential Analog Audio Output (Output) - The full scale differential output level is specified in the
26, DAC Analog Characteristics specification table.
27
28
Channel B Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.
6 DS593F1

6 Page









CDB4272 pdf, datenblatt
CS4272
DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE
(Note 12)
Fast Roll-Off
Parameter
Single Speed Mode - 48 kHz
Passband (Note 9)
Frequency Response 10 Hz to 20 kHz
StopBand
StopBand Attenuation
Group Delay
De-emphasis Error (Note 11)
(Relative to 1kHz)
Double Speed Mode - 96 kHz
Passband (Note 9)
Frequency Response 10 Hz to 20 kHz
StopBand
StopBand Attenuation
Group Delay
Quad Speed Mode - 192 kHz
Passband (Note 9)
Frequency Response 10 Hz to 20 kHz
StopBand
StopBand Attenuation
Group Delay
Min
to -0.01 dB corner
to -3 dB corner
(Note 10)
Fs = 32 kHz
Fs = 44.1 kHz
Fs = 48 kHz
0
0
-0.01
.547
90
-
-
-
-
to -0.01 dB corner
to -3 dB corner
(Note 10)
0
0
-0.01
.583
80
-
to -0.01 dB corner
to -3 dB corner
(Note 10)
0
0
-0.01
.635
90
-
Typ
-
-
-
-
-
12/Fs
-
-
-
-
-
-
-
-
4.6/Fs
-
-
-
-
-
4.7/Fs
Max
.454
.499
+0.01
-
-
-
±0.23
±0.14
±0.09
.430
.499
0.01
-
-
-
.105
.490
0.01
-
-
-
Unit
Fs
Fs
dB
Fs
dB
s
dB
dB
dB
Fs
Fs
dB
Fs
dB
s
Fs
Fs
dB
Fs
dB
s
12 DS593F1

12 Page





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