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DS1007 Schematic ( PDF Datasheet ) - Dallas Semiconducotr

Teilenummer DS1007
Beschreibung 7-1 Silicon Delay Line
Hersteller Dallas Semiconducotr
Logo Dallas Semiconducotr Logo 




Gesamt 6 Seiten
DS1007 Datasheet, Funktion
www.dalsemi.com
DS1007
7-1 Silicon Delay Line
FEATURES
All-silicon time delay
7 independent buffered delays
Delay tolerance ±2 ns
Four delays can be custom set between 3 ns
and 10 ns
Three delays can be custom set between 9 ns
and 40 ns
Delays are stable and precise
Economical
Auto-insertable, low profile
Surface mount 16-pin SOIC
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom specifications available
Quick turn prototypes
PIN ASSIGNMENT
IN1 1
16 IN3
OUT1 2
15 OUT3
IN2 3
14 IN4
OUT2 4
13 OUT4
VCC 5
IN5 6
12 GND
11 OUT7
OUT5
IN6
7
8
10 IN7
9 OUT6
DS1007 16-Pin DIP (300-mil)
See Mech. Drawings Section
IN1
OUT1
IN2
OUT2
VCC
IN5
OUT5
IN6
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
IN3
OUT3
IN4
OUT4
GND
OUT7
IN7
OUT6
DS1007S 16-Pin SOIC
(300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
IN1 - IN7 - Inputs
Out1 – Out7 - Outputs
GND
- Ground
VCC - +5 Volts
DESCRIPTION
The DS1007 7-in-1 Silicon Delay Line provides seven independent delay times which are set by Dallas
Semiconductor to the customer’s specification. The delay times can be set from 3 ns to 40 ns with an
accuracy of ±2 ns at room temperature. The device is offered in both a 16-pin DIP and a 16-pin SOIC.
Since the DS1007 is an all-silicon solution, better economy and reliability are achieved when compared to
older methods using hybrid technology. The DS1007 reproduces the input logic state at the output after
the fixed delay. Dallas Semiconductor can customize standard products to meet special needs. For special
requests and rapid delivery, call (972) 371–4348.
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DS1007 Datasheet, Funktion
TEST CONDITIONS
DS1007
INPUT:
Ambient Temperature:
Supply Voltage (VCC):
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
25°C ± 3°C
5.0V ± 0.1V
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
50 ohm max.
3.0 ns max.
500 ns
1 µs
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising edge.
NOTE:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
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