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PDF DP8226 Data sheet ( Hoja de datos )
| Número de pieza | DP8226 | |
| Descripción | 4-Bit Bidirectional Bus Transceivers | |
| Fabricantes | National | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DP8226 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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June 1990
DP8216 DP8216M DP8226 DP8226M
4-Bit Bidirectional Bus Transceivers
General Description
The DP8216 DP8216M and DP8226 DP8226M are 4-bit bi-
directional bus drivers to use in bus oriented applications
The non-inverting DP8216 DP8216M and inverting
DP8226 DP8226M drivers are provided for flexibility in sys-
tem design
Each buffered line of the four-bit drivers consists of two
separate buffers that are TRI-STATE to achieve direct bus
interface and bidirectional capability On one side of the
driver the output of one buffer and the input of another are
tied together (DB) this side is used to interface to the sys-
tem side components such as memories I O etc because
its interface is TTL compatible and it has high driver (50
mA) On the other side of the driver the inputs and outputs
are separated to provide maximum flexibility Of course
they can be tied together so that the driver can be used to
buffer a true bidirectional bus The DO outputs on this side
of the driver have a special high voltage output drive capa-
bility so that direct interface to the 8080 type CPUs is
achieved with an adequate amount of noise immunity
The CS input is a device enable When it is ‘‘high’’ the out-
put drivers are all forced to their high-impedance state
When it is a ‘‘low’’ the device is enabled and the direction of
the data flow is determined by the DIEN input
The DIEN input controls the direction of data flow which is
accomplished by forcing one of the pair of buffers into its
high-impedance state and allowing the other to transmit its
data A simple two-gate circuit is used for this function
Features
Y Data bus buffer driver to 8080 type CPUs
Y Low input load current 0 25 mA maximum
Y High output drive capability for driving system data
bus 50 mA at 0 5V
Y Power up-down protection
Y DP8216 DP8216M have non-inverting outputs
Y DP8226 DP8226M have inverting outputs
Y Output high voltage compatible with direct interface to
MOS
Y TRI-STATE outputs
Y Advanced Schottky processing
Y Available in military and commercial temperature
Logic Diagrams
DP8216 DP8216M
DP8226 DP8226M
TL F 8753 – 1
TRI-STATE is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL F 8753
TL F 8753 – 2
RRD-B30M105 Printed in U S A
1 page  
Test Conditions
Input rise and fall times of 5 0 ns between 1 0V and 2 0V
Output loading is 5 0 mA and 10 pF
Speed measurements are made at 1 5V levels
Test Load Circuit
Switching Time Waveforms
TL F 8753 – 4
Connection Diagram
Dual-In-Line Package
TL F 8753 – 5
Capacitance TA e 25 C
Symbol
Parameter
Limit
Unit
Min Typ Min
CIN
COUT
Input Capacitance
Output Capacitance
DO Outputs
DO Outputs
4 6 pF
6 10 pF
13 18 pF
Note This parameter is periodically sampled and is not 100% tested Condi-
tion of measurement is f e 1 MHz VBIAS e 2 5V VCC e 5 0V and TA e
25 C
TL F 8753 – 3
Order Number DP8216J DP8216N DP8226J DP8226N
DP8216MJ or DP8226MJ
See NS Package Number J16A or N16A
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet DP8226.PDF ] | |
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