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PDF P174FCT374T Data sheet ( Hoja de datos )
| Número de pieza | P174FCT374T | |
| Descripción | Fast CMOS Octal D Registers | |
| Fabricantes | Pericom | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de P174FCT374T (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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PI74FCT374T/534T/574T
(P25IΩ7S4eFriCesT) P31774FTC/T523347T4T//5275744TT
(25Ω Series) PI74FCT2374T/2574TOCTAL D REGISTERS (3-STATE)11112222333344445555666677778888999900001111222233334444555566667777888899990000111122223333444455556666777788889999000011112222111122223333444455556666777788889999000011112222333344445555666677778888999900001111222233334444555566667777888899990000111122221111222233334444555566667777888899990000111122223333444455556666777788889999000011112222333344445555666677778888999900001111222211112222333344445555666677778888999900001111222233334444555566667777888899990000111122223333444455556666777788889999000011112222111122223333444455556666777788889999000011112222
Product Features:
• PI74FCT374/534/574/2374/2574Tispincompatiblewithbipolar
FAST™ Series at a higher speed and lower power
consumption
• 25Ω series resistor on all outputs (FCT2XXX only)
• TTL input and output levels
• Low ground bounce outputs
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 20-pin 173 mil wide plastic TSSOP (L)
– 20-pin 300 mil wide plastic DIP (P)
– 20-pin 150 mil wide plastic QSOP (Q)
– 20-pin 150 mil wide plastic TQSOP (R)
– 20-pin 300 mil wide plastic SOIC (S)
Fast CMOS Octal D
Registers (3-State)
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
ducedintheCompany’sadvanced 0.6/0.8 micron CMOStechnology,
achieving industry leading speed grades. All PI74FCT2XXX devices
have a built-in 25 ohm series resistor on all outputs to reduce noise
resulting from reflections, thus eliminating the need for an external
terminating resistor.
The PI74FCT374T/534T/574T and P174FCT2374T/2574T are
8-bit wide octal registers designed with eight D-type flip-flops with
a buffered common clock and buffered 3-state outputs. When
output enable (OE) is LOW, the outputs are enabled. When OE is
HIGH, the outputs are in the high impedance state. Input data
meeting the setup and hold time requirements of the D inputs is
transferred to the O outputs on the LOW-to-HIGH transition of the
clock input.
Device models available upon request.
PI74FCT374/2374T and PI74FCT574/2574T Logic Block Diagram
D0 D1 D2 D3 D4 D5 D6 D7
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
QQQQQQQQ
OE
O0 O1 O2 O3 O4 O5 O6 O7
PI74FCT534T Logic Block Diagram
D0 D1
CP
CP D
CP D
QQ
D2
CP D
Q
D3
CP D
Q
D4
CP D
Q
D5
CP D
Q
D6
CP D
Q
D7
CP D
Q
OE
O0 O1 O2 O3 O4 O5 O6 O7
1 PS2016A 03/11/96
1 page  
PI74FCT374T/534T/574T
(25Ω Series) P174FCT2374T/2574T
11223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677O8899C001122T1122A3344L556677D889900R1122E3344G556677I88S9900T1122E3344R5566S778899(00311-22S1122T3344A5566T7788E9900)1122
PI74FCT374/2374T Switching Characteristics over Operating Range
Parameters Description
Conditions(1)
374T/2374T
Com.
Min Max
374AT/2374AT
Com.
Min Max
tPLH Propagation Delay
tPHL CP to ON
tPZH Output Enable Time
tPZL OE to ON
tPHZ Output Disable Time(3)
tPLZ OE to ON
tSU Setup Time HIGH or
LOW, DN to CP
tH Hold Time HIGH or
LOW, DN to CP
tW CP Pulse Width(3)
HIGH or LOW
CL = 50 pF
RL = 500Ω
2.0 10.0 2.0
1.5 12.5 1.5
1.5 8.0 1.5
2.0 — 2.0
1.5 — 1.5
7.0 — 5.0
6.5
6.5
5.5
—
—
—
374CT/2374CT
Com.
Min Max
2.0 5.2
1.5 5.5
1.5 5.0
2.0 —
1.5 —
5.0 —
374DT
Com.
Min Max
2.0 4.5
Unit
ns
1.5 5.5 ns
1.5 5.0 ns
2.0 — ns
1.0 — ns
3.0 — ns
PI74FCT534T Switching Characteristics over Operating Range
Parameters Description
Conditions(1)
534T
Com.
Min Max
534AT
Com.
Min Max
tPLH Propagation Delay
tPHL CP to ON
tPZH Output Enable Time
tPZL OE to ON
tPHZ Output Disable Time(3)
tPLZ OE to ON
tSU Setup Time HIGH or
LOW, DN to CP
tH Hold Time HIGH or
LOW, DN to CP
tW CP Pulse Width(3)
HIGH or LOW
CL = 50 pF
RL = 500Ω
2.0 10.0 2.0
1.5 12.5 1.5
1.5 8.0 1.5
2.0 — 2.0
1.5 — 1.5
7.0 — 5.0
6.5
6.5
5.5
—
—
—
534CT
Com.
Min Max
2.0 5.2
1.5 5.5
1.5 5.0
2.0 —
1.5 —
5.0 —
534DT
Com.
Min Max
2.0 4.5
Unit
ns
1.5 5.5 ns
1.5 5.0 ns
2.0 — ns
1.0 — ns
3.0 — ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
5 PS2016A 03/11/96
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet P174FCT374T.PDF ] | |
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