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PDF DS1220 Data sheet ( Hoja de datos )
| Número de pieza | DS1220 | |
| Descripción | 16k Nonvolatile SRAM | |
| Fabricantes | Dallas | |
| Logotipo |  |
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FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Directly replaces 2k x 8 volatile static RAM
or EEPROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 24-pin DIP package
Read and write access times as fast as 100 ns
Lithium energy source is electrically
disconnected to retain freshness until power
is applied for the first time
Full ±10% VCC operating range (DS1220AD)
Optional ±5% VCC operating range
(DS1220AB)
Optional industrial temperature range of
-40°C to +85°C, designated IND
DS1220AB/AD
16k Nonvolatile SRAM
PIN ASSIGNMENT
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 A8
22 A9
21 WE
20 OE
19 A10
18 CE
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
24-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTION
A0-A10
DQ0-DQ7
- Address Inputs
- Data In/Data Out
CE - Chip Enable
WE - Write Enable
OE
VCC
GND
- Output Enable
- Power (+5V)
- Ground
DESCRIPTION
The DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs
organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. The NV SRAMs can be used in place of existing 2k x 8 SRAMs
directly conforming to the popular bytewide 24-pin DIP standard. The devices also match the pinout of
the 2716 EPROM and the 2816 EEPROM, allowing direct substitution while enhancing performance.
There is no limit on the number of write cycles that can be executed and no additional support circuitry is
required for microprocessor interfacing.
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AC ELECTRICAL CHARACTERISTICS
DS1220AB-150
PARAMETER
SYMBOL DS1220AD-150
MIN MAX
Read Cycle Time
Access Time
OE to Output Valid
tRC 150
tACC 150
tOE 70
CE to Output Valid
tCO
150
OE or CE to Output Active
tCOE
5
Output High Z from
Deselection
tOD
35
Output Hold from Address
Change
tOH 5
Write Cycle Time
Write Pulse Width
Address Setup Time
Write Recovery Time
Output High Z from WE
tWC
tWP
tAW
tWR1
tWR2
tODW
150
100
0
0
10
35
Output Active from WE
tOEW
5
Data Setup Time
Data Hold Time
tDS 60
tDH1
0
tDH2 10
DS1220AB-200
DS1220AD-200
MIN MAX
200
200
100
200
5
35
5
200
150
0
0
10
35
5
50
0
10
DS1220AB/AD
(cont’d)
UNITS NOTES
ns
ns
ns
ns
ns 5
ns 5
ns
ns
ns 3
ns
ns 12
ns 13
ns 5
ns 4
ns 4
ns 12
ns 13
5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet DS1220.PDF ] | |
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