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PDF DS1221 Data sheet ( Hoja de datos )
| Número de pieza | DS1221 | |
| Descripción | Nonvolatile Controller x 4 Chip | |
| Fabricantes | Dallas | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DS1221 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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DS1221
Nonvolatile Controller x 4 Chip
www.dalsemi.com
NOT RECOMMENDED FOR NEW DESIGNS, SEE DS1321 DATASHEET INSTEAD.
FEATURES
Converts CMOS RAMs into nonvolatile
memories
Data is automatically protected during power loss
2-to-4 decoder provides for up to 4 CMOS
RAMs
Provides for redundant batteries
Test battery condition on power-up
Full ±10% operating range
Unauthorized access can be prevented with
optional security feature
16-pin 0.3-inch DIP saves PC board space
Optional 16-pin SOIC surface mount package
Optional industrial temperature range of
-40°C to +85°C available
PIN DESCRIPTION
A, B - Address Inputs
CE - Chip Enable Input
CE0 - CE3
VBAT1
VBAT2
- Chip Enable Outputs
- + Battery 1
- + Battery 2
* RST
VCCI
VCCO
- Reset
- +5V Supply
- RAM Supply
* RD - Read Inpu
* WE
*D/Q
- Write Input
- Data Input/Output
PIN ASSIGNMENT
VCCO
VBAT1
1
2
16 VCCI
15 VBAT2
*RST
A
3
4
14 CE
13 CE0
B5
12 CE1
*RD
*WE
GND
6
7
8
11 CE2
10 CE3
9 *D/Q
DS1221 16-Pin DIP (300-mil)
See Mech. Drawings Section
VCCO 1
16 VCCI
VBAT1 2
15 VBAT2
*RST
A
3
4
14 CE
13 CE0
B5
12 CE1
*RD 6
11 CE2
*WE
GND
7
8
10 CE3
9 *D/Q
DS1221 16-Pin SOIC (300-mil)
See Mech. Drawings Section
*Used with optional security circuit only and must be connected to ground in all other cases.
DESCRIPTION
The DS1221 Nonvolatile Controller x 4 Chip is a CMOS circuit which solves the application problem of
converting CMOS RAMs into nonvolatile memories. Incoming power is monitored for an out-of-
tolerance condition. When such a condition is detected, the chip enable outputs are inhibited to
accomplish write protection and the battery is switched on to supply RAMs with uninterrupted power. An
optional security code prevents unauthorized users from obtaining access to the memory space. The
nonvolatile controller/decoder circuitry uses a low-leakage CMOS process which affords precise voltage
detection at extremely low battery consumption. By combining the DS1221 with up to four CMOS
memories and lithium batteries, nonvolatile operation can be achieved.
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CAPACITANCE
PARAMETER
Input Capacitance
Output Capacitance
SYMBOL
CIN
COUT
MIN
AC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL MIN
CE Propagation Delay
tPD 5
CE High to Power-Fail
tPF
Address Setup
tAS 20
PARAMETER
Recovery at Power-Up
VCC Slew Rate 4.5 - 4.25V
VCC Slew Rate 4.25 - 3V
VCC Slew Rate 4.25 - 4.5V
CE Pulse Width
SYMBOL
tREC
tF
tFB
tR
tCE
NOTES:
1. All voltages are referenced to ground.
2. Only one battery input is required.
MIN
2
300
10
0
TYP
MAX
5
7
DS1221
(tA = 25°C)
UNITS NOTES
pF
pF
(0°C to 70°C; VCC = 4.5 to 5.5V)
TYP
MAX UNITS NOTES
15 25 ns 5
0 ns
ns 9
(0°C to 70°C; VCC < 4.5V)
TYP
MAX UNITS NOTES
5 10 ms
µs
µs
µs
1.5 µs 7, 8
3. Measured with VCCO and CE0 - CE3 open.
4. ICCO1 is the maximum average load which the DS1221 can supply to the memories.
5. Measured with a load as shown in Figure 4.
6. ICCO2 is the maximum average load current which the DS1221 can supply to the memories in the
battery back-up mode.
7. Chip enable outputs CE0 - CE3 can only sustain leakage current in the battery back-up mode.
8. tCE max. must be met to ensure data integrity on power loss.
9. tAS is only required to keep the decoder outputs glitch-free. While CE is low, the outputs ( CE0 - CE3 )
will be defined by inputs A and B with a propagation delay of tPD from an A or B input change.
10. For applications where higher currents are required, please see the DS1259 Battery Manager Chip
data sheet.
5 of 8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet DS1221.PDF ] | |
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