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PDF DG444 Data sheet ( Hoja de datos )

Número de pieza DG444
Descripción Monolithic / Quad SPST / CMOS Analog Switches
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
DG444, DG445
June 1999 File Number 3586.5
Monolithic, Quad SPST, CMOS Analog
Switches
The DG444 and DG445 monolithic CMOS analog switches
are drop-in replacements for the popular DG211 and DG212
series devices. They include four independent single pole
single throw (SPST) analog switches and TTL and CMOS
compatible digital inputs.
These switches feature lower analog ON resistance (<85)
and faster switch time (tON <250ns) compared to the DG211
and DG212. Charge injection has been reduced, simplifying
sample and hold applications.
The improvements in the DG444 series are made possible
by using a high voltage silicon-gate process. An epitaxial
layer prevents the latch-up associated with older CMOS
technologies. The 44V maximum voltage range permits
controlling ±20V signals when operating with ±20V power
supplies.
The four switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with
analog signals is quite low over a ±5V analog input range.
The switches in the DG444 and DG445 are identical,
differing only in the polarity of the selection logic.
Pinout
DG444, DG445 (PDIP, SOIC)
TOP VIEW
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13 V+
12 VL
11 S3
10 D3
9 IN3
Features
• ON Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . 85
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . <35µW
• Fast Switching Action
- tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns
- tOFF (Max, DG444) . . . . . . . . . . . . . . . . . . . . . . . 140ns
• Low Charge Injection
• Upgrade from DG211/DG212
• TTL, CMOS Compatible
• Single or Split Supply Operation
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
DG444DJ
-40 to 85 16 Ld PDIP
DG444DY
-40 to 85 16 Ld SOIC
DG445DJ
-40 to 85 16 Ld PDIP
DG445DY
-40 to 85 16 Ld SOIC
PKG. NO.
E16.3
M16.15
E16.3
M16.15
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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DG444 pdf
DG444, DG445
Test Circuits and Waveforms
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing
edge of the output waveform.
LOGIC
INPUT
3V
0V
SWITCH
INPUT
VS
SWITCH
OUTPUT 0V
50%
tOFF
VO 80%
tr < 20ns
tf < 20ns
80%
tON
NOTE: Logic input waveform is inverted for switches that have
the opposite logic sense.
VL V+
SWITCH
INPUT
S1
IN1
D1
VO
LOGIC
INPUT
3V
GND
RL CL
V-
Repeat test for Channels 2, 3 and 4.
For load conditions, see Specifications. CL includes fixture and
stray capacitance.
VO = VS -R----L-----+----r-R--D---L-S----(--O----N-----)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
SWITCH
OUTPUT
VO
VL
RG
V+
D1
INX
(DG444)
OFF
ON
OFF
VG
INX
(DG445) OFF
ON
Q = VO x CL
OFF
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V-
VIN = 3V
GND
FIGURE 2B. TEST CIRCUIT
VO
CL
V+ +15V
C
SIGNAL
GENERATOR 10dBm
VS
VD
50
+15V
C V+
SIGNAL
GENERATOR 10dBm
VS
0V, 2.4V
IN1
IN2 0V, 2.4V
ANALYZER
RL
VD
GND V-
NC
C
-15V
FIGURE 3. CROSSTALK TEST CIRCUIT
INX 0V, 2.4V
ANALYZER
RL
VD
GND V-
-15V
C
FIGURE 4. OFF ISOLATION TEST CIRCUIT
5

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