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89C538 Schematic ( Datenblatt PDF ) - NXP

Teilenummer 89C538
Beschreibung CMOS single-chip 8-bit microcontrollers with FLASH program memory
Hersteller NXP
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Gesamt 30 Seiten
		
89C538 Datasheet, Funktion
INTEGRATED CIRCUITS
89C535/89C536/89C538
CMOS single-chip 8-bit microcontrollers
with FLASH program memory
Preliminary specification
IC20 Data Handbook
1997 June 05
Philips
Semiconductors






89C538 Datasheet, Funktion
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
with FLASH program memory
Preliminary specification
89C535/89C536/89C538
Table 1. Special Function Registers
SYMBOL
DESCRIPTION
DIRECT
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
ADDRESS MSB
LSB
ACC*
Accumulator
E0H E7 E6 E5 E4 E3 E2 E1 E0
B* B register
F0H F7 F6 F5 F4 F3 F2 F1 F0
DPTR:
DPH
DPL
Data Pointer (2 bytes)
Data Pointer High
Data Pointer Low
83H
82H
AF AE AD AC AB AA A9 A8
IE* Interrupt Enable
A8H EA
– ET2 ES ET1 EX1 ET0 EX0
BF BE BD BC BB BA B9 B8
IP* Interrupt Priority
B8H –
– PT2 PS PT1 PX1 PT0 PX0
87 86 85 84 83 82 81 80
P0* Port 0
80H AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
97 96 95 94 93 92 91 90
P1* Port 1
90H – – – – – – T2EX T2
A7 A6 A5 A4 A3 A2 A1 A0
P2* Port 2
A0H AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8
B7 B6 B5 B4 B3 B2 B1 B0
P3* Port 3
B0H RD WR T1
T0 INT1 INT0 TxD RxD
RESET
VALUE
00H
00H
00H
00H
00H
x0000000B
FFH
FFH
FFH
FFH
PCON# Power Control
87H SMOD
D7
PSW*
Program Status Word
D0H
CY
RACAP2H# Timer 2 Capture High
RACAP2L# Timer 2 Capture Low
CBH
CAH
SBUF
Serial Data Buffer
99H
9F
SCON*
Serial Control
98H SM0
SP Stack Pointer
81H
8F
TCON*
Timer Control
88H TF1
CF
T2CON*
TH0
TH1
TH2#
TL0
TL1
TL2#
Timer 2 Control
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
C8H
8CH
8DH
CDH
8AH
8BH
CCH
TF2
TMOD
Timer Mode
89H GATE
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
– Reserved bits.
D6
AC
9E
SM1
8E
TR1
CE
EXF2
C/T
– – GF1 GF0
D5 D4 D3 D2
F0 RS1 RS0 OV
9D 9C 9B 9A
SM2 REN TB8 RB8
8D
TF0
CD
RCLK
8C
TR0
CC
TCLK
8B
IE1
CB
EXEN2
8A
IT1
CA
TR2
M1 M0 GATE C/T
PD
D1
99
TI
89
IE0
C9
C/T2
M1
IDL 0xxxx000B
D0
P 00H
00H
00H
xxxxxxxxB
98
RI 00H
07H
88
IT0 00H
C8
CP/RL2
00H
00H
00H
00H
00H
00H
00H
M0 00H
1997 Jun 05
6

6 Page







89C538 pdf, datenblatt
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
with FLASH program memory
Preliminary specification
89C535/89C536/89C538
Serial Interface
The 89C538/536 has a standard 80C51 serial port. This serial port
can operate in 4 modes:
Mode 0: Serial data enters and exits through RxD. TxD outputs the
shift clock. 8 bits are transmitted/received (LSB first). The baud rate
is fixed at 1/12 the oscillator frequency.
Mode 1: 10 bits are transmitted (through TxD) or received (through
RxD): a start bit (0), 8 data bits (LSB first), and a stop bit (1). On
receive, the stop bit goes into RB8 in Special Function Register
SCON. The baud rate is variable.
Mode 2: 11 bits are transmitted (throughTxD) or received (through
RxD): start bit (0), 8 data bits (LSB first), a programmable 9th data
bit, and a stop bit (1). On Transmit, the 9th data bit (TB8 in SCON)
can be assigned the value of 0 or 1, Or, for example, the parity bit
(P, in the PSW) could be moved into TB8. On receive, the 9th data
bit goes into RB8 in Special Function Register SCON, while the stop
bit is ignored. The baud rate is programmable to either 1/32 or 1/64
the oscillator frequency.
Mode 3: 11 bits are transmitted (through TxD) or received (through
jRxD): a start bit (0), 8 data bits (LSB first), a programmable 9th data
bit, and a stop bit (1). In fact, Mode 3 is the same as Mode 2 in all
respects except baud rate. The baud rate in Mode 3 is variable.
In all four modes, transmission is initiated by any instruction that
uses SBUF as a destination register. Reception is initiated in Mode 0
by the condition RI = 0 and REN = 1. Reception is initiated in the
other modes by the incoming start bit if REN = 1.
Serial Port Control Register
The serial port control and status register is the Special
FunctionRegister SCON, shown in Figure 5. This register contains
not only the mode selection bits, but also the 9th data bit for transmit
and receive (TB8 and RB8), and the serial port interrupt bits (TI and
RI).
Additional details of serial port operation may be found in the 80C51
Family Hardware Description found in the Philips 80C51–Based
8–Bit Microcontroller Data Handbook, IC20.
SCON Address = 98H
Bit Addressable
SM0 SM1 SM2 REN TB8 RB8
Bit: 7 6 5 4 3 2
Tl
1
Reset Value = 0000 0000B
Rl
0
Symbol Function
SM0
SM1
SM2
REN
TB8
RB8
Tl
Rl
Serial Port Mode Bit 0
Serial Port Mode Bit 1
SM0 SM1 Mode
Description Baud Rate**
00
01
10
11
0
shift register
fOSC/12
1
8-bit UART
variable
2
9-bit UART
fOSC/64 or fOSC/32
3
9-bit UART
variable
Enables the Automatic Address Recognition feature in Modes 2 or 3. If SM2 = 1 then Rl will not be set unless the
received 9th data bit (RB8) is 1, indicating an address, and the received byte is a Given or Broadcast Address.
In Mode 1, if SM2 = 1 then Rl will not be activated unless a valid stop bit was received, and the received byte is a
Given or Broadcast Address. In Mode 0, SM2 should be 0.
Enables serial reception. Set by software to enable reception. Clear by software to disable reception.
The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired.
In modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM2 = 0, RB8 is the stop bit that was received.
In Mode 0, RB8 is not used.
Transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of the stop bit in the
other modes, in any serial transmission. Must be cleared by software.
Receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the stop bit time in
the other modes, in any serial reception (except see SM2). Must be cleared by software.
NOTE:
**fOSC = oscillator frequency
SU00867
Figure 5. SCON: Serial Port Control Register
1997 Jun 05
12

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