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PDF 87LPC769 Data sheet ( Hoja de datos )
| Número de pieza | 87LPC769 | |
| Descripción | Low power/ low price/ low pin count 20 pin microcontroller with 4 kB OTP 8-bit A/D/ and DAC | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
87LPC769
Low power, low price, low pin count
(20 pin) microcontroller with 4 kB OTP
8-bit A/D, and DAC
Preliminary specification
Supersedes data of 2000 Apr 26
IC28 Data Handbook
2001 Jan 11
Philips
Semiconductors
1 page  
Philips Semiconductors
Low power, low price, low pin count (20 pin)
microcontroller with 4 kB OTP 8-bit A/D, and DAC
Preliminary specification
87LPC769
ORDERING INFORMATION
Part Number
Temperature Range °C and Package
P87LPC769HD
–40 to +125, Plastic Small Outline Package
PIN CONFIGURATION, 20-PIN SO PACKAGE
Frequency
Drawing Number
20 MHz (5 V), 10 MHz (3 V) SOT163–1
LOGIC SYMBOL
CMP2/P0.0 1
DAC0/P1.7 2
DAC1/P1.6 3
RST/P1.5 4
VSS 5
X1/P2.1 6
X2/CLKOUT/P2.0 7
INT1/P1.4 8
SDA/INT0/P1.3 9
SCL/T0/P1.2 10
20 P0.1/CIN2B
19 P0.2/CIN2A
18 P0.3/CIN1B/AD0
17 P0.4/CIN1A/AD1
16 P0.5/CMPREF/AD2
15 VDD
14 P0.6/CMP1/AD3
13 P0.7/T1
12 P1.0/TxD
11 P1.1/RxD
SU01366
VDD
VSS
AD0
AD1
AD2
AD3
CMP2
CIN2B
CIN2A
CIN1B
CIN1A
CMPREF
CMP1
T1
CLKOUT/X2
X1
TxD
RxD
T0
INT0
INT1
RST
DAC1
DAC0
SCL
SDA
SU01367
2001 Jan 11
2
5 Page 
Philips Semiconductors
Low power, low price, low pin count (20 pin)
microcontroller with 4 kB OTP 8-bit A/D, and DAC
Preliminary specification
87LPC769
Name
P1M1#
P1M2#
P2M1#
P2M2#
PCON
PSW*
PT0AD#
Description
Port 1 output mode 1
Port 1 output mode 2
Port 2 output mode 1
Port 2 output mode 2
Power control register
Program status word
Port 0 digital input disable
SFR
Address MSB
91h (P1M1.7) (P1M1.6)
92h (P1M2.7) (P1M2.6)
A4h P2S P1S
A5h –
–
87h SMOD1 SMOD0
D7 D6
D0h CY AC
F6h
Bit Functions and Addresses
–
–
P0S
–
BOF
D5
F0
(P1M1.4)
(P1M2.4)
ENCLK
–
POF
D4
RS1
–
–
T1OE
–
GF1
D3
RS0
–
–
T0OE
–
GF0
D2
OV
LSB
Reset
Value
(P1M1.1) (P1M1.0) 00h1
(P1M2.1) (P1M2.0) 00h1
(P2M1.1) (P2M1.0) 00h
(P2M2.1) (P2M2.0) 00h1
PD IDL Note 3
D1 D0
F1 P 00h
00h
SCON*
SBUF
SADDR#
SADEN#
SP
Serial port control
Serial port data buffer
register
Serial port address register
Serial port address enable
Stack pointer
98h
99h
A9h
B9h
81h
9F 9E 9D 9C 9B 9A
SM0 SM1 SM2 REN TB8 RB8
99
TI
98
RI 00h
xxh
00h
00h
07h
TCON*
TH0
TH1
TL0
TL1
TMOD
Timer 0 and 1 control
Timer 0 high byte
Timer 1 high byte
Timer 0 low byte
Timer 1 low byte
Timer 0 and 1 mode
8F 8E 8D 8C 8B 8A 89 88
88h TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00h
8Ch 00h
8Dh 00h
8Ah 00h
8Bh 00h
89h GATE C/T M1 M0 GATE C/T M1 M0 00h
WDCON# Watchdog control register
A7h
–
– WDOVF WDRUN WDCLK WDS2 WDS1 WDS0 Note 4
WDRST# Watchdog reset register
A6h
xxh
NOTES:
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset value shown in the table for these bits is 0.
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
0000b for all other reset causes if the watchdog is disabled.
2001 Jan 11
8
11 Page | ||
| Páginas | Total 61 Páginas | |
| PDF Descargar | [ Datasheet 87LPC769.PDF ] | |
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