Datenblatt-pdf.com


87C550 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 87C550
Beschreibung 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless/ 8 channel 8 bit A/D/ watchdog timer
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 28 Seiten
87C550 Datasheet, Funktion
INTEGRATED CIRCUITS
80C550/83C550/87C550
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D,
watchdog timer
Product specification
Supersedes data of 1998 Jan 19
IC20 Data Handbook
1998 May 01
Philips
Semiconductors






87C550 Datasheet, Funktion
Philips Semiconductors
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer
Product specification
80C550/83C550/87C550
Table 1. 8XC550 Special Function Registers
SYMBOL DESCRIPTION
ACC*
Accumulator
DIRECT
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
ADDRESS MSB
LSB
E0H
E7 E6
E5
E4
E3
E2
E1
E0
RESET
VALUE
00H
ADAT#
A/D result
C6H
xxH
ADCON# A/D control
C5H
––
– ADCI ADCS AADR2 AADR1 AADR0 xxx00000B
B* B register
F0H
F7 F6
F5
F4
F3
F2
F1
F0 00H
DPTR:
DPH
DPL
Data pointer
(2 bytes):
High byte
Low byte
83H
82H
00H
00H
BF BE BD BC BB BA B9 B8
IP*# Interrupt priority
B8H – PWD PAD PS PT1 PX1 PT0 PX0 x0000000B
IE*#
P0*
P1*
P2*
P3*
PCON#
Interrupt enable
Port 0
Port 1
Port 2
Port 3
Power control
AF AE AD AC AB AA A9 A8
A8H EA EWD EAD ES ET1 EX1 ET0 EX0 00H
80H
87 86
85
84
83
82
81
80 FFH
90H
97 96
95
94
93
92
91
90 FFH
A0H
A7 A6
A5
A4
A3
A2
A1
A0 FFH
B0H
B7 B6
B5
B4
B3
B2
B1 B 0 FFH
87H SMOD SIDL
– GF1 GF0 PD IDL 00xx0000B
PSW*
SBUF
Program status word
Serial data buffer
D0H
99H
SCON*
SP
Serial port control
Stack pointer
98H
81H
TCON*
Timer counter/control
88H
D7 D6
D5
D4
D3
D2
CY AC
F0
RS1 RS0
OV
D1
9F 9E
9D
9C
9B
9A
SM0 SM1 SM2 REN TB8 RB8
99
TI
8F 8E
8D
8C
8B
8A
89
TF1 TR1 TF0 TR0 IE1 IT1 IE0
D0
P 00H
xxH
98
RI 00H
07H
88 00H
IT0 00H
TMOD Timer/counter mode 89H GATE C/T M1 M0 GATE C/T M1 M0 00H
TH0 Timer 0 high byte
8CH
00H
TH1 Timer 1 high byte
8DH
00H
TL0 Timer 0 low byte
8AH
00H
TL1 Timer 1 low byte
8BH
00H
C7 C6
C5
C4
C3
C2
C1
C0
WDCON*# Watchdog timer
control
C0H
PRE2 PRE1 PRE0
WDRUN WDTOF WDMOD 000xx000B**
WDL#
Watchdog timer
reload
C1H
FFH**
WFEED1# Watchdog timer
feed 1
C2H
xxH
WFEED2# Watchdog timer
feed 2
C3H
xxH
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
**This value is not valid for a masked ROM part (83C550) when running from internal memory (EA = 1). See data sheet for details.
1998 May 01
6

6 Page









87C550 pdf, datenblatt
Philips Semiconductors
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer
Product specification
80C550/83C550/87C550
Watchdog Function
The watchdog consists of a programmable prescaler and the main
timer. The prescaler derives its clock from the on-chip oscillator. The
prescaler consists of a divide by 12 followed by a 13 stage counter
with taps from stage 6 through stage 13. The tap selection is
programmable. The watchdog main counter is a down counter
clocked (decremented) each time the programmable prescaler
underflows. The watchdog generates an underflow signal (and is
autoloaded) when the watchdog is at count 0 and the clock to
decrement the watchdog occurs. The watchdog is 8 bits long and
the autoload value can range from 0 to FFH. (The autoload value of
0 is permissible since the prescaler is cleared upon autoload).
This leads to the following user design equations. Definitions: tOSC
is the oscillator period, N is the selected prescaler tap value, W is
the main counter autoload value, tMIN is the minimum watchdog
time-out value (when the autoload value is 0), tMAX is the maximum
time-out value (when the autoload value is FFH), tD is the design
time-out value.
tMIN = tOSC × 12 × 64
tMAX = tMIN × 128 × 256
tD = tMIN × 2PRESCALER × W
(where prescaler = 0, 1, 2, 3, 4, 5, 6, or 7)
Note that the design procedure is anticipated to be as follows. A
tMAX will be chosen either from equipment or operation
considerations and will most likely be the next convenient value
higher than tD. (If the watchdog were inadvertently to start from FFH,
an overflow would be guaranteed, barring other anomalies, to occur
within tMAX). Then the value for the prescaler would be chosen from:
prescaler = log2 (tMAX / (tOSC × 12 × 256)) – 6
This then also fixes tMIN. An autoload value would then be chosen
from:
W = tD / tMIN – 1
The software must be written so that a feed operation takes place
every tD seconds from the last feed operation. Some tradeoffs may
need to be made. It is not advisable to include feed operations in
minor loops or in subroutines unless the feed operation is a specific
subroutine.
Interrupts
The 8XC550 interrupt structure is a seven-source, two-priority level
interrupt system similar to that of the standard 80C51
microcontroller. The interrupt sources are listed below in the order of
their internal polling sequence. This is the order in which
simultaneous interrupts of the same priority level would be serviced.
Interrupt Priorities
PRIORITY SOURCE
Highest
INT0
TF0
INT1
TF1
TI & RI
ADCI
Lowest WDTOF
VECTOR
ADDRESS
0003H
000BH
0013H
001BH
0023H
002BH
0033H
FUNCTION
External interrupt 0
Counter/timer 0 overflow
External interrupt 1
Counter/timer 1 overflow
Serial port transmit/receive
A/D converter conversion
complete
Watchdog timer overflow
(only when not in
watchdog mode)
Interrupt Control Registers
The standard 80C51 interrupt enable and priority registers have
been modified slightly to take into account the additional interrupt
sources of the 8XC550.
Interrupt Enable Register
MSB
EA
EWD
EAD
ES
LSB
ET1 EX1 ET0 EX0
Symbol
EA
EWD
EAD
ES
ET1
EX1
ET0
EX0
Position
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
Function
Global interrupt enable
Watchdog timer overflow
A/D conversion complete
Serial port transmit or receive
Timer 1 overflow
External interrupt 1
Timer 0 overflow
External interrupt 0
Interrupt Priority Register
MSB
PWD
PAD
PS
PT1 PX1 PT0
LSB
PX0
Symbol
PWD
PAD
PS
PT1
PX1
PT0
PX0
Position
IP.6
IP.5
IP.4
IP.3
IP.2
IP.1
IP.0
Function
Watchdog timer
A/D conversion
Serial port interrupt
Timer 1 interrupt
External interrupt 1
Timer 0 interrupt
External interrupt 0
Power-Down and Idle Modes
The 8XC550 includes the standard 80C51 power-down and idle
modes of reduced power consumption. In addition, the 8XC550
includes an option to separately turn off the serial port for extra
power savings when it is not needed. Also, the individual functional
blocks such as the counter/timers are automatically disabled when
they are not running. This actually turns off the clocks to the block in
question, resulting in additional power savings. Note that when the
watchdog timer is operating, the processor is inhibited from entering
the power-down mode. This is due to the fact that the oscillator is
stopped in the power-down mode, which would effectively turn off
the watchdog timer. In keeping with the purpose of the watchdog
timer, the processor is prevented from accidentally entering
power-down due to some erroneous operation.
Power Control Register
MSB
SMOD SIDL
LSB
GF1
GF0
PD
IDL
Symbol
SMOD
SIDL
GF1
GF0
PD
IDL
Position
PCON.7
PCON.6
PCON.5
PCON.4
PCON.3
PCON.2
PCON.1
PCON.0
Function
Double baud rate bit. When set to a 1 and
Timer 1 is used to generate baud rate, and
the serial port is used in modes 1, 2, or 3.
Separately idles the serial port for additional
power savings.
Reserved
Reserved
General-purpose flag bit.
General-purpose flag bit.
Power-down bit. Starting this bit activates
power-down operation.
Idle mode bit. Setting this bit activates
idle mode operation.
If 1s are written to PD and IDL at the same time, PD takes
precedence.
1998 May 01
12

12 Page





SeitenGesamt 28 Seiten
PDF Download[ 87C550 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
87C55080C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless/ 8 channel 8 bit A/D/ watchdog timerNXP Semiconductors
NXP Semiconductors
87C55280C51 8-bit microcontroller 8K/256 OTP/ 8 channel 10 bit A/D/ I2C/ PWM/ capture/compare/ high I/ONXP Semiconductors
NXP Semiconductors
87C55480C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless/ 7 channel 10 bit A/D/ I2C/ PWM/ capture/compare/ high I/O/ 64L LQFPNXP Semiconductors
NXP Semiconductors

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche